1 comment:
File src/cpu/intel/smm/gen1/smmrelocate.c:
If setup is wrong, is worth coming to ramstage at all? Fail even before postcar, because stage cache […]
Those setups are not wrong, per se. It just that in some cases (that we now avoid) this MTRR cannot be used to cover TSEG due to the impossibility of alignment. It seems better to check for that before setting up SMRR.
To view, visit change 34740. To unsubscribe, or for help writing mail filters, visit settings.