[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/gma.c: Refactor CdClk init code

[Angel Pons (Code Review)]

Attention is currently required from: Paul Menzel, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50136 )

Change subject: nb/intel/haswell/gma.c: Refactor CdClk init code
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Patch Set 3:

(1 comment)

File src/northbridge/intel/haswell/gma.c:

https://review.coreboot.org/c/coreboot/+/50136/comment/5f63f311_f2967fc4 
PS3, Line 369:  *    ULX defaults to 337MHz with possible override for 450MHz
             :  *    ULT is fixed at 450MHz
             :  * others default  to 540MHz with possible override for 450MHz
> The indentation and alingment looks strange to me.

It's aligning the numbers. I don't remember why I did it this way, but I can see why it looks strange.