Marshall Dawson submitted this change.
soc/amd/picasso: Add MADT entry for GNB IOAPIC
Add the missing entry using new Kconfig symbol for IOAPIC ID. coreboot
will always enable the GNB IOAPIC.
Cq-Depend: chrome-internal:3247431, chrome-internal:3253044
BUG=b:167421913, b:166519072
TEST=Boot fully to morphius board with and without amd_iommu kernel
parameter. Dump MADT and IVRS tables. Cross check ioapic entries
in MADT against IVRS.
BRANCH=Zork
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: Ic4a2e9b71dba948e8a4907e5f97131426d8a4a3e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45056
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/picasso/acpi.c
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 84be4bd..6f6383d 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -49,10 +49,12 @@
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);
- /* Write IOAPIC, only one */
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
CONFIG_PICASSO_FCH_IOAPIC_ID, IO_APIC_ADDR, 0);
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ CONFIG_PICASSO_GNB_IOAPIC_ID, GNB_IO_APIC_ADDR, IO_APIC_INTERRUPTS);
+
/* 0: mean bus 0--->ISA */
/* 0: PIC 0 */
/* 2: APIC 2 */
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