3 comments:
File src/soc/intel/common/block/cse/cse.c:
Patch Set #19, Line 511: No CSE device
CSE device is disabled?
File src/soc/intel/common/block/include/intelblocks/cse.h:
Patch Set #19, Line 55: Configuration
PCI configuration space?
/* HFSTS register offsets in PCI config space */
enum {
PCI_ME_HFSTS1 = 0x40,
PCI_ME_HFSTS2 = 0x48,
PCI_ME_HFSTS3 = 0x60,
PCI_ME_HFSTS4 = 0x64,
PCI_ME_HFSTS5 = 0x68,
PCI_ME_HFSTS6 = 0x6C,
};
move before function declaration.
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