Sugnan Prabhu S would like Aamir Bohra to review this change.

View Change

mb/intel/sm: Enable RP devices as per board PCIe map

Change-Id: I17f34a52cfbfeec8193f83d1dbe321c60ad58da7
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
---
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/48456/1

diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
index daccd3d..5a4d9a5 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
@@ -247,17 +247,17 @@
 		device pci 19.0 off end # I2C4
 		device pci 19.1 on  end # I2C5
 		device pci 19.2 off end # UART2
-		device pci 1c.0 on  end # RP1
+		device pci 1c.0 off  end # RP1
 		device pci 1c.1 off end # RP2
 		device pci 1c.2 off end # RP3
 		device pci 1c.3 off end # RP4
 		device pci 1c.4 on  end # RP5
 		device pci 1c.5 on  end # RP6
 		device pci 1c.6 off end # RP7
-		device pci 1c.7 off end # RP8
+		device pci 1c.7 on end # RP8
 		device pci 1d.0 on  end # RP9
 		device pci 1d.1 off end # RP10
-		device pci 1d.2 on  end # RP11
+		device pci 1d.2 off  end # RP11
 		device pci 1d.3 off end # RP12
 		device pci 1e.0 on  end # UART0
 		device pci 1e.1 off end # UART1

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