[coreboot-gerrit] [S] Change in coreboot[main]: soc/mediatek/mt8196: Disable irq2axi feature

[Runyang Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu.

Runyang Chen has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84896?usp=email )

Change subject: soc/mediatek/mt8196: Disable irq2axi feature
......................................................................

Patch Set 3:

(12 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84896/comment/b0a79a91_6d6af657?usp... :
PS1, Line 9: ,
           : s
> `. […]

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/b7503a7d_adc43948?usp... :
PS1, Line 13: TEST=Build pass and the interrupt can be correctly handled.
> Paste the new log message? Also, did you just check `/proc/interrupts`?

Yes, we have checked it,
Additionally, if the interrupt is not handled, it can also cause the system to fail to boot.
Also, we checked the irq2axi disable log.

File src/mainboard/google/rauru/romstage.c:

https://review.coreboot.org/c/coreboot/+/84896/comment/51eb3bb3_77fe879d?usp... :
PS1, Line 9: 	/* TODO: add romstage main function */
> Should this TODO comment be removed now?

Done

File src/soc/mediatek/mt8196/include/soc/irq2axi.h:

https://review.coreboot.org/c/coreboot/+/84896/comment/5a4b3f91_3d4b9537?usp... :
PS1, Line 8: (
> remove

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/a5943915_b3a9f2d1?usp... :
PS1, Line 11: (
> remove

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/9b35d986_eb20789a?usp... :
PS1, Line 14: irq2axi_uninit
> Or `irq2axi_disable`?

Done

File src/soc/mediatek/mt8196/irq2axi_init.c:

PS1:
> How about renaming to irq2axi. […]

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/d8bd72ea_97848438?usp... :
PS1, Line 2: #include <console/console.h>
> leave one empty line between header license and include header.

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/2a45535f_d612ae0a?usp... :
PS1, Line 9: 	printk(BIOS_INFO, "%s irq uninit\n", __func__);
> Reads like a debug message as function name and message are the same. […]

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/1ae66d6d_47645cdb?usp... :
PS1, Line 11: write32
> write32p

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/68e3dc30_49fbf4c4?usp... :
PS1, Line 14: 0x0C00FFEC
> Define a macro for it.

Done

https://review.coreboot.org/c/coreboot/+/84896/comment/437845f5_7994d8f4?usp... :
PS1, Line 14: config = read32((u32 *)0x0C00FFEC);
            : 	config &= ~(0x1);
            : 	write32((u32 *)0x0C00FFEC, config);
> clrbits32p

Done