Felix Singer submitted this change.
sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate
Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77738
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
---
M src/southbridge/intel/i82801ix/chip.h
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/chip.h
M src/southbridge/intel/i82801jx/lpc.c
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h
index d52a0c2..33f9713 100644
--- a/src/southbridge/intel/i82801ix/chip.h
+++ b/src/southbridge/intel/i82801ix/chip.h
@@ -56,12 +56,12 @@
/* IDE configuration */
uint8_t sata_port_map : 6;
- unsigned int sata_clock_request : 1;
- unsigned int sata_traffic_monitor : 1;
+ bool sata_clock_request;
+ bool sata_traffic_monitor;
- unsigned int c4onc3_enable:1;
- unsigned int c5_enable : 1;
- unsigned int c6_enable : 1;
+ bool c4onc3_enable;
+ bool c5_enable;
+ bool c6_enable;
unsigned int throttle_duty : 3;
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index d897130..91b7456 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -142,14 +142,14 @@
{
struct device *lpc_dev = __pci_0_1f_0;
struct southbridge_intel_i82801ix_config *config = lpc_dev->chip_info;
- return config->c5_enable == 1;
+ return config->c5_enable;
}
bool southbridge_support_c6(void)
{
struct device *lpc_dev = __pci_0_1f_0;
struct southbridge_intel_i82801ix_config *config = lpc_dev->chip_info;
- return config->c6_enable == 1;
+ return config->c6_enable;
}
static void i82801ix_power_options(struct device *dev)
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index f12a67e..48ad212 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -43,11 +43,11 @@
/* IDE configuration */
uint8_t sata_port_map : 6;
- unsigned int sata_clock_request : 1;
+ bool sata_clock_request;
- unsigned int c4onc3_enable:1;
- unsigned int c5_enable : 1;
- unsigned int c6_enable : 1;
+ bool c4onc3_enable;
+ bool c5_enable;
+ bool c6_enable;
unsigned int throttle_duty : 3;
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index e93502f..7cff33a 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -144,14 +144,14 @@
{
struct device *lpc_dev = __pci_0_1f_0;
struct southbridge_intel_i82801jx_config *config = lpc_dev->chip_info;
- return config->c5_enable == 1;
+ return config->c5_enable;
}
bool southbridge_support_c6(void)
{
struct device *lpc_dev = __pci_0_1f_0;
struct southbridge_intel_i82801jx_config *config = lpc_dev->chip_info;
- return config->c6_enable == 1;
+ return config->c6_enable;
}
static void i82801jx_power_options(struct device *dev)
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