Elyes HAOUAS has uploaded this change for review.

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src/nb: Use tabs for code indent

Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/northbridge/amd/amdfam10/amdfam10_util.c
M src/northbridge/intel/x4x/dq_dqs.c
M src/northbridge/via/vx900/lpc.c
3 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/28934/1
diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c
index e0195c6..9d249e2 100644
--- a/src/northbridge/amd/amdfam10/amdfam10_util.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_util.c
@@ -26,7 +26,7 @@
#include <include/device/pci_def.h>
u32 Get_NB32(u32 dev, u32 reg)
{
- return pci_read_config32(dev_find_slot(0, PCI_DEV2DEVFN(dev)), reg);
+ return pci_read_config32(dev_find_slot(0, PCI_DEV2DEVFN(dev)), reg);
}
#endif

diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index 8704d39..64131d8 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -43,7 +43,7 @@

static void set_db(const struct sysinfo *s, struct dll_setting *dq_dqs_setting)
{
- struct db_limit limit;
+ struct db_limit limit;

switch (s->selected_timings.mem_clk) {
default:
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index b90e2d4..b9dac56 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -209,7 +209,7 @@
static void vx900_lpc_set_resources(struct device *dev)
{
struct resource *mmio, *spi;
- u32 reg;
+ u32 reg;

mmio = find_resource(dev, VX900_MMCONFIG_MBAR);
if (mmio) {

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba
Gerrit-Change-Number: 28934
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr>