Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10725
-gerrit
commit dc017005da7c9a6472c8f0f8332b12ea62d410d8 Author: Patrick Georgi pgeorgi@chromium.org Date: Tue Jun 30 12:49:50 2015 +0200
samsung/lumpy: implement get_write_protect_state
Current vboot wants that function.
Change-Id: I08590739112a7fcce7a983b6d77ff500692ef7d3 Signed-off-by: Patrick Georgi pgeorgi@chromium.org --- src/mainboard/samsung/lumpy/chromeos.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 04ae5ff..8b772be 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -52,9 +52,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: GPIO24 = KBC3_SPI_WP# */ gpios->gpios[0].port = GPIO_SPI_WP; gpios->gpios[0].polarity = ACTIVE_HIGH; - gpios->gpios[0].value = - (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 2)), - SATA_SP) >> FLAG_SPI_WP) & 1; + gpios->gpios[0].value = get_write_protect_state(); strncpy((char *)gpios->gpios[0].name,"write protect", GPIO_MAX_NAME_LENGTH);
@@ -89,6 +87,17 @@ void fill_lb_gpios(struct lb_gpios *gpios) } #endif
+int get_write_protect_state(void) +{ + device_t dev; +#ifdef __PRE_RAM__ + dev = PCI_DEV(0, 0x1f, 2); +#else + dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); +#endif + return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; +} + int get_developer_mode_switch(void) { device_t dev;