Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Matt DeVillier.

Arthur Heymans has uploaded this change for review.

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cpu/x86: Link page tables in stage if possible

When switching back and forward from 32 to 64, for example to call a
32bit FSP or toe call the payload, a new page tables in the respective
stage will be linked.

TESTED on google/vilbox and qemu/q35: boots to payload

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562
---
M src/arch/x86/Kconfig
M src/cpu/intel/car/non-evict/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
M src/cpu/x86/64bit/Makefile.mk
M src/cpu/x86/64bit/entry64.inc
M src/cpu/x86/64bit/mode_switch.S
M src/cpu/x86/64bit/mode_switch2.S
M src/cpu/x86/64bit/pt.S
M src/mainboard/emulation/qemu-i440fx/Kconfig
M src/mainboard/emulation/qemu-q35/Kconfig
M src/soc/amd/common/block/cpu/noncar/pre_c.S
M src/soc/amd/picasso/Kconfig
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
13 files changed, 25 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/80337/1

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 0c11653..1697ee7 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -84,9 +84,13 @@
 	  is an experimental option: do not enable unless one wants to test it
 	  and has the means to recover a system when coreboot fails to boot.
 
+config PAGE_TABLES_IN_CBFS
+	bool
+	default n
+
 config ARCH_X86_64_PGTBL_LOC
 	hex "x86_64 page table location in CBFS"
-	depends on ARCH_BOOTBLOCK_X86_64
+	depends on ARCH_BOOTBLOCK_X86_64 && PAGE_TABLES_IN_CBFS
 	default 0xfffe9000
 	help
 	  The position where to place pagetables. Needs to be known at
diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S
index 578bf03..9485cd4 100644
--- a/src/cpu/intel/car/non-evict/cache_as_ram.S
+++ b/src/cpu/intel/car/non-evict/cache_as_ram.S
@@ -214,7 +214,7 @@
 	andl	$0xfffffff0, %esp
 
 #if ENV_X86_64
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 
 	movd	%mm2, %rdi
 	shlq	$32, %rdi
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index 32fddd6..1cb422d 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -363,7 +363,7 @@
 	subl	$4, %esp
 
 #if ENV_X86_64
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 
 	movd	%mm2, %rdi
 	shlq	$32, %rdi	/* BIST */
diff --git a/src/cpu/x86/64bit/Makefile.mk b/src/cpu/x86/64bit/Makefile.mk
index 24a5a96..7604164 100644
--- a/src/cpu/x86/64bit/Makefile.mk
+++ b/src/cpu/x86/64bit/Makefile.mk
@@ -2,6 +2,7 @@
 
 all_x86-y += mode_switch.S
 all_x86-y += mode_switch2.S
+all_x86-y += pt.S
 
 # Add --defsym=_start=0 to suppress a linker warning.
 $(objcbfs)/pt: $(dir)/pt.S $(obj)/config.h
@@ -9,7 +10,7 @@
 	$(OBJCOPY_ramstage) -Obinary -j .rodata $@.tmp $@
 	rm $@.tmp
 
-cbfs-files-y += pagetables
+cbfs-files-$(CONFIG_PAGE_TABLES_IN_CBFS) += pagetables
 pagetables-file := $(objcbfs)/pt
 pagetables-type := raw
 pagetables-compression := none
diff --git a/src/cpu/x86/64bit/entry64.inc b/src/cpu/x86/64bit/entry64.inc
index 878f310..52da603 100644
--- a/src/cpu/x86/64bit/entry64.inc
+++ b/src/cpu/x86/64bit/entry64.inc
@@ -11,9 +11,11 @@
 
 #if ENV_X86_64
 	.code32
+#if CONFIG(PAGE_TABLES_IN_CBFS)
 #if (CONFIG_ARCH_X86_64_PGTBL_LOC & 0xfff) > 0
 #error pagetables must be 4KiB aligned!
 #endif
+#endif
 
 #include <cpu/x86/msr.h>
 #if defined(__RAMSTAGE__)
diff --git a/src/cpu/x86/64bit/mode_switch.S b/src/cpu/x86/64bit/mode_switch.S
index 01fe003..9555cef 100644
--- a/src/cpu/x86/64bit/mode_switch.S
+++ b/src/cpu/x86/64bit/mode_switch.S
@@ -44,7 +44,7 @@
 	movl	%eax, %ebx
 
 	/* Preserves ebx */
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 
 	/* Place return value in rax */
 	movl	%ebx, %eax
diff --git a/src/cpu/x86/64bit/mode_switch2.S b/src/cpu/x86/64bit/mode_switch2.S
index 1807d2e..18c6425 100644
--- a/src/cpu/x86/64bit/mode_switch2.S
+++ b/src/cpu/x86/64bit/mode_switch2.S
@@ -21,7 +21,7 @@
 	mov	%esp, %ebp
 
 	/* Enter long mode, preserves ebx */
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 
 	/* Align stack */
 	movabs	$0xfffffffffffffff0, %rax
diff --git a/src/cpu/x86/64bit/pt.S b/src/cpu/x86/64bit/pt.S
index b105528..67e4b1b 100644
--- a/src/cpu/x86/64bit/pt.S
+++ b/src/cpu/x86/64bit/pt.S
@@ -18,7 +18,7 @@
 #define _GEN_PAGE(a) (_PRES + _RW + _US + _PS + _A +  _D + (a))
 
 .global PM4LE
-.align 32
+.align 4096
 PM4LE:
 .quad _GEN_DIR(PDPE_table)
 
diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig
index f02c92d..a71ead1 100644
--- a/src/mainboard/emulation/qemu-i440fx/Kconfig
+++ b/src/mainboard/emulation/qemu-i440fx/Kconfig
@@ -28,6 +28,10 @@
 	select GBB_FLAG_DISABLE_FWMP
 
 if ARCH_BOOTBLOCK_X86_64
+config PAGE_TABLES_IN_CBFS
+	bool
+	default y
+
 # Need to install page tables in DRAM as the virtual MMU has problems translating paging
 # request when the page table resides in emulated ROM. This causes undefined behaviour
 # when handling data requests, as well as fetching and decoding instructions
diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
index 489fd07..6337882 100644
--- a/src/mainboard/emulation/qemu-q35/Kconfig
+++ b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -30,6 +30,10 @@
 	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab-16M.fmd" if VBOOT_SLOTS_RW_AB
 
 if ARCH_BOOTBLOCK_X86_64
+config PAGE_TABLES_IN_CBFS
+	bool
+	default y
+
 # Need to install page tables in DRAM as the virtual MMU has problems translating paging
 # request when the page table resides in emulated ROM. This causes undefined behaviour
 # when handling data requests, as well as fetching and decoding instructions
diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S
index bb2203b..0e0be52 100644
--- a/src/soc/amd/common/block/cpu/noncar/pre_c.S
+++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S
@@ -28,7 +28,7 @@
 	post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY)
 
 #if ENV_X86_64
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 #endif
 
 	/* Clear .bss section */
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 42fe66f..cc8b689 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -164,7 +164,7 @@
 
 config C_ENV_BOOTBLOCK_SIZE
 	hex
-	default 0x10000
+	default 0x20000
 	help
 	  Sets the size of the bootblock stage that should be loaded in DRAM.
 	  This variable controls the DRAM allocation size in linker script
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index c22e7d9..ba98f1b 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -280,7 +280,7 @@
 	andl	$0xfffffff0, %esp
 
 #if ENV_X86_64
-	setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
+	setup_longmode $PM4LE
 
 	movd	%mm2, %rdi
 	shlq	$32, %rdi

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