Marshall Dawson uploaded patch set #3 to this change.
soc/amd/picasso: Assign IOAPIC IDs, GNB APIC base with FSP
Add Kconfig symbols for the FCH and GNB IOAPIC IDs, then pass
the info to FSP to keep it in sync with coreboot. Do the same
for the northbridge's IOAPIC base address.
Use the new values where needed, and reserve the resources
consumed by the GNB IOAPIC.
BUG=b:167421913, b:166519072
TEST=Boot Morphius and verify settings
BRANCH=Zork
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I57d3d6b2ebd8b5d511dbcb4324ea065cc3111a2d
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/acpi.c
M src/soc/amd/picasso/agesa_acpi.c
M src/soc/amd/picasso/fsp_params.c
M src/soc/amd/picasso/include/soc/iomap.h
M src/soc/amd/picasso/root_complex.c
6 files changed, 47 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45115/3
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