ron minnich uploaded patch set #13 to this change.

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WIP: Add configurable ramstage support for minimal PCI scanning

This CL has changes that allow us to enable a configurable
ramstage, and one change that allows us to minimize PCI
scanning.

We add two new variables to src/Kconfig:
CONFIGURABLE_RAMSTAGE
is the overall variable controlling other options for minimizing the
ramstage.

MINIMAL_PCI_SCANNING
is how we indicate we wish to enable minimal PCI scanning.

We modify pci_{bus,dev}_read_resources to return immediately if
CONFIG(MINIMAL_PCI_SCANNING) is true. Otherwise they call
pci_{bus,dev}_read_resources_always.

We provide one example where we had to scan the device, namely,
the SATA device (0:1f.2) on the qemu q35 target.

Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
---
M src/Kconfig
M src/device/pci_device.c
M src/include/device/pci.h
M src/southbridge/intel/i82801ix/sata.c
4 files changed, 32 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36221/13

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