2 comments:
Patch Set #5, Line 7: mb/asrock/h110m: Add PEG Gen3 support
Thank you for the clarification. […]
I moved the setting of "PrimaryDisplay" to
Change-Id: Ibed05fc9171e2bd73654f0da6273a8534746913d
File src/mainboard/asrock/h110m/devicetree.cb:
# Use SRCCLKREQ0# and CLKSRC0 for PEG x16 root port
register "PcieRpClkReqSupport[0]" = "1"
register "PcieRpClkReqNumber[0]" = "0"
# Enable Latency Tolerance Reporting Mechanism
register "PcieRpLtrEnable[0]" = "1"
register "PcieRpClkSrcNumber[0]" = "0"
Yes you are right. Usually these parameters are used to configure PCH. […]
Sorry, I did not notice the wrong strings:
# Enable Latency Tolerance Reporting Mechanism
register "PcieRpLtrEnable[0]" = "1"
This should not be here.
Removed it in the last patch.
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