Sumeet R Pawnikar has uploaded this change for review.

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[WIP] alderlake: enable DPTF functionality for ADL-RVP board

Enable DPTF functionality for alderlake based ADL-RVP board

BRANCH=None
BUG=None
TEST=Built for adlrvp and tested on adlrvp board

Change-Id: I319bb0ddb9cd9bbe48c8ee09c2742a78da230b7b
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
---
M src/drivers/intel/dptf/dptf.c
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/adlrvp/devicetree.cb
3 files changed, 73 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/52020/1
diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c
index 1713e72..d816847 100644
--- a/src/drivers/intel/dptf/dptf.c
+++ b/src/drivers/intel/dptf/dptf.c
@@ -18,9 +18,17 @@
#define GENERIC_HID_EISAID "INT3403"
#define FAN_HID_EISAID "INT3404"

+#if 0
+/* Below are ACPI IDs for Tiger Lake SoC */
#define DPTF_DEVICE_HID "INTC1040"
#define GENERIC_HID "INTC1043"
#define FAN_HID "INTC1044"
+#endif
+
+/* Below are ACPI IDs for Alder Lake SoC */
+#define DPTF_DEVICE_HID "INTC1041"
+#define GENERIC_HID "INTC1046"
+#define FAN_HID "INTC1048"

/*
* Helper method to determine if a device is "used" (called out anywhere as a source or a target
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index c1c4586..8a64e49 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -10,6 +10,7 @@
select DRIVERS_I2C_HID
select DRIVERS_I2C_GENERIC
select DRIVERS_INTEL_SOUNDWIRE
+ select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_PMC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC
select DRIVERS_USB_ACPI
select DRIVERS_SPI_ACPI
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index cade987..dc531d5 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -132,6 +132,12 @@
register "TcssAuxOri" = "0"

register "s0ix_enable" = "1"
+ register "dptf_enable" = "1"
+
+ register "power_limits_config" = "{
+ .tdp_pl1_override = 45,
+ .tdp_pl2_override = 56,
+ }"

register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
@@ -209,7 +215,64 @@
device pci 00.0 on end # Host Bridge
device pci 01.0 on end # PEG10
device pci 02.0 on end # Graphics
- device pci 04.0 on end # DPTF
+ device pci 04.0 on
+ chip drivers/intel/dptf
+
+ ## sensor information
+ register "options.tsr[0].desc" = ""Ambient""
+ register "options.tsr[1].desc" = ""Battery""
+ register "options.tsr[2].desc" = ""DDR""
+ register "options.tsr[3].desc" = ""Skin""
+
+ ## Passive Policy
+ # TODO: below values are initial reference values only
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 95, 10000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 50000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 50000),
+ [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 50000),
+ [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 85, 50000),
+ }"
+
+ ## Critical Policy
+ # TODO: below values are initial reference values only
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN),
+ [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 95, SHUTDOWN),
+ }"
+
+ ## Power Limits Control
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 35000,
+ .max_power = 45000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 200,
+ },
+ .pl2 = {
+ .min_power = 56000,
+ .max_power = 56000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 3000 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
+
+ device generic 0 on end
+ end
+ end # DPTF
device pci 05.0 on end # IPU
device pci 06.0 on end # PEG60
device pci 06.2 on end # PEG62

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I319bb0ddb9cd9bbe48c8ee09c2742a78da230b7b
Gerrit-Change-Number: 52020
Gerrit-PatchSet: 1
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Gerrit-MessageType: newchange