Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72806 )
Change subject: nb/intel/haswell/pcie.c: Make UBSAN shut up ......................................................................
nb/intel/haswell/pcie.c: Make UBSAN shut up
UBSAN complains about "shift out of bounds", likely because integer literals are signed by default, and the result of the operation and the result of the operation would be a negative value (although the negative value is then casted to an unsigned type, which results in the expected value anyway). To make UBSAN happy, make sure that two integer literals are unsigned so that the shift doesn't overflow.
Tested on out-of-tree Asrock Z97 Extreme6, UBSAN now dies elsewhere.
Change-Id: Iaf8710a5ae4e05d9f41f40f9e3617e155027800c Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/pcie.c 1 file changed, 21 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/72806/1
diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c index e8d146b..7fe57e9 100644 --- a/src/northbridge/intel/haswell/pcie.c +++ b/src/northbridge/intel/haswell/pcie.c @@ -82,7 +82,7 @@ uint32_t slotcap = pci_read_config32(dev, PEG_SLOTCAP);
/* Physical slot number (zero for ports connected to onboard devices) */ - slotcap &= ~(0x1fff << 19); + slotcap &= ~(0x1fffU << 19); if (slot_implemented) { uint16_t slot_number = peg_cfg->phys_slot_number & 0x1fff; if (slot_number == 0) { @@ -124,7 +124,7 @@ /* Select -3.5 dB de-emphasis */ pci_or_config32(dev, PEG_LCTL2, 1 << 6);
- pci_or_config32(dev, PEG_L0SLAT, 1 << 31); + pci_or_config32(dev, PEG_L0SLAT, 1U << 31);
pci_update_config32(dev, 0x250, ~(7 << 20), 2 << 20);