[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/{cnl,icl}: Add support to configure interrupt overrides

[Aamir Bohra (Code Review)]

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34349 )

Change subject: src/soc/intel/{cnl,icl}: Add support to configure interrupt overrides
......................................................................

src/soc/intel/{cnl,icl}: Add support to configure interrupt overrides

Change-Id: If55701b7ad292e3357d0b419bb6168bd2c3e4030
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/icelake/fsp_params.c
4 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/34349/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 4235b7a..c8dfc13 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -97,6 +97,7 @@
    select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
    select SOC_INTEL_COMMON_BLOCK_SMM
    select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+	select SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_NHLT
    select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index fe5b3dd..4eef58e 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -18,6 +18,7 @@
 #include <device/pci.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
+#include <intelblocks/irq.h>
 #include <intelblocks/lpss.h>
 #include <intelblocks/xdci.h>
 #include <soc/intel/common/vbt.h>
@@ -408,6 +409,11 @@
    	configure_gspi_cs(i, config,
    			&params->SerialIoSpiCsPolarity[0], NULL, NULL);
 #endif
+
+	/* Fill interrupt config override */
+#if CONFIG(SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE)
+	get_irq_table((void *)params->DevIntConfigPtr, &params->NumOfDevIntConfig);
+#endif
 }

/* Mainboard GPIO Configuration */
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index a2261a0..d31c8eb 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -51,6 +51,7 @@
    select SOC_INTEL_COMMON_BLOCK_SA
    select SOC_INTEL_COMMON_BLOCK_SMM
    select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+	select SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
    select SSE2
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index ed86c27..ee45024 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -18,6 +18,7 @@
 #include <device/pci.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
+#include <intelblocks/irq.h>
 #include <intelblocks/lpss.h>
 #include <intelblocks/xdci.h>
 #include <soc/intel/common/vbt.h>
@@ -241,6 +242,12 @@

params->Heci3Enabled = config->Heci3Enabled;
    params->Device4Enable = config->Device4Enable;
+
+	/* Fill interrupt config override */
+#if CONFIG(SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE)
+	get_irq_table((void *)params->DevIntConfigPtr, &params->NumOfDevIntConfig);
+#endif
+
 }

/* Mainboard GPIO Configuration */