Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15950
-gerrit
commit bae906098bd62be43bd9a0d2878c28fd1fd8af81 Author: Stefan Reinauer reinauer@chromium.org Date: Fri May 20 14:50:38 2016 -0700
nvidia/tegra124: Adjust memlayout to Chrome OS toolchain
The bootblock gets slightly too big, so adjust the space assigned to it.
Signed-off-by: Stefan Reinauer reinauer@chromium.org BUG=none BRANCH=none TEST=emerge-nyan coreboot works again.
Change-Id: Ib44d98692ae88c7cd3610c8e643d7d48ac858161 Signed-off-by: Martin Roth martinroth@chromium.org Original-Commit-Id: 4b9038b018ed7a26fbce01d982b22166b328de37 Original-Change-Id: If494e49fb60c11e01ca780c84036ebf24459628c Original-Reviewed-on: https://chromium-review.googlesource.com/346492 Original-Reviewed-by: Martin Roth martinroth@chromium.org Original-Commit-Queue: Stefan Reinauer reinauer@google.com Original-Tested-by: Stefan Reinauer reinauer@google.com --- src/soc/nvidia/tegra124/include/soc/memlayout.ld | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld index 5bab362..6e596f3 100644 --- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld @@ -31,9 +31,9 @@ SECTIONS PRERAM_CBFS_CACHE(0x40006000, 16K) VBOOT2_WORK(0x4000A000, 16K) STACK(0x4000E000, 8K) - BOOTBLOCK(0x40010000, 24K) - VERSTAGE(0x40016000, 72K) - ROMSTAGE(0x40028000, 95K) + BOOTBLOCK(0x40010000, 26K) + VERSTAGE(0x40016800, 72K) + ROMSTAGE(0x40028800, 93K) TIMESTAMP(0x4003FC00, 1K) SRAM_END(0x40040000)