Attention is currently required from: Tim Wawrzynczak, Angel Pons, Patrick Rudolph.

Tim Wawrzynczak uploaded patch set #21 to this change.

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sb/intel/common: Refactor _PRT generation to support GSI-based tables

Newer Intel SoCs also support _PRT tables, but they route PCI devices to
more than just PIRQs, and statically specify IRQs instead of using link
devices. Extend/refactor intel_acpi_gen_def_acpi_pirq to support this
additional use case.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ica420a3d12fd1d64c8fe6e4b326fd779b3f10868
---
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/acpi_pirq_gen.h
M src/southbridge/intel/common/rcba_pirq.c
M src/southbridge/intel/common/rcba_pirq.h
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/lynxpoint/lpc.c
10 files changed, 174 insertions(+), 79 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/50857/21

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ica420a3d12fd1d64c8fe6e4b326fd779b3f10868
Gerrit-Change-Number: 50857
Gerrit-PatchSet: 21
Gerrit-Owner: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro@google.com>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>
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