Kane Chen has uploaded this change for review.
mb/google/hatch/variants/helios: Modify DPTF parameters
Modify DTRT CPU Throttle Effect on TSR0 change to TSR3.
BUG=b:131272830
BRANCH=none
TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I5b4645d7552e795a33c1b86d95c4061da71c65bd
---
M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38299/1
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
index a359284..f40d10a 100644
--- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
@@ -99,8 +99,8 @@
})
Name (DTRT, Package () {
- /* CPU Throttle Effect on TSR0 */
- Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 },
+ /* CPU Throttle Effect on TSR3 */
+ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR3, 100, 60, 0, 0, 0, 0 },
/* Charger Throttle Effect on TSR0 */
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 },
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