Matt DeVillier merged this change.
{soc, southbridge} : Correct typo in comment
BUG=N/A
TEST=N/A
Change-Id: I1b207e0b77bac8860ba7501378297c1f3604141c
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32453
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/intel/braswell/southcluster.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/lynxpoint/pch.c
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 000790d..bf9f689 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -347,7 +347,7 @@
* Common code for the south cluster devices.
*/
-/* Set bit in function disble register to hide this device. */
+/* Set bit in function disable register to hide this device. */
static void sc_disable_devfn(struct device *dev)
{
void *func_dis = (void *)(PMC_BASE_ADDRESS + FUNC_DIS);
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 746c11a..f8540af 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -144,7 +144,7 @@
}
#ifndef __SMM__
-/* Set bit in Function Disble register to hide this device */
+/* Set bit in function disable register to hide this device */
static void pch_hide_devfn(unsigned devfn)
{
switch (devfn) {
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index 5cf67aa..a57bae3 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -100,7 +100,7 @@
pci_write_config32(dev, PCH_PCS, reg32);
}
-/* Set bit in Function Disble register to hide this device */
+/* Set bit in function disable register to hide this device */
void pch_disable_devfn(struct device *dev)
{
switch (dev->path.pci.devfn) {
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