[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60183 )

Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
......................................................................

Patch Set 5: Code-Review+1

(2 comments)

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/60183/comment/31dd4a5c_7ba24f0c 
PS4, Line 284: printk(BIOS_ERR, "%s: Unknown PCIe RP\n", __func__);
do we need to maintain this msg in https://review.coreboot.org/c/coreboot/+/60183/4..5/src/soc/intel/common/blo... ?

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/60183/comment/f96a329c_df136140 
PS5, Line 293: CPU
nit: `get_pcie_rp_pmc_idx()` function can return -1 irrespective of being PCH or CPU hence just *CPU* in debug log might be misleading? Can we go for more generic word, may be PCIe(CPU/PCH)?