68 comments:
File src/soc/mediatek/mt8192/dramc_ana_init_config.c:
Patch Set #1, Line 126: CA_LP_CTRL0_RG_CA_MS_SLV_LP_SEL, a_cfg->all_slave_en==0);
spaces required around that '==' (ctx:VxV)
Patch Set #1, Line 129: CA_LP_CTRL0_RG_CA_MS_SLV_LP_SEL, a_cfg->all_slave_en==0);
spaces required around that '==' (ctx:VxV)
Patch Set #1, Line 369: pcw = (pll_freq/xtal_freq) << (8 + 1 -fbk_sel-prediv - posdiv);
need consistent spacing around '-' (ctx:WxV)
Patch Set #1, Line 534: u8 tx_ardq_sermode=0;
spaces required around that '=' (ctx:VxV)
Patch Set #1, Line 535: u8 tx_arcr_sermode=0;
spaces required around that '=' (ctx:VxV)
Patch Set #1, Line 536: u8 ardll_sermode_b=0;
spaces required around that '=' (ctx:VxV)
Patch Set #1, Line 537: u8 ardll_sermode_c=0;
spaces required around that '=' (ctx:VxV)
Patch Set #1, Line 540: switch (tr->dq_p2s_ratio) {
switch and case should be at the same indent
Patch Set #1, Line 541: case 4 :
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Patch Set #1, Line 544: case 8 :
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Patch Set #1, Line 550: default: dramc_dbg("ERROR: tr->dq_p2s_ratio= %2d, Not support!!",tr->dq_p2s_ratio);
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Patch Set #1, Line 550: default: dramc_dbg("ERROR: tr->dq_p2s_ratio= %2d, Not support!!",tr->dq_p2s_ratio);
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Patch Set #1, Line 550: default: dramc_dbg("ERROR: tr->dq_p2s_ratio= %2d, Not support!!",tr->dq_p2s_ratio);
trailing statements should be on next line
Patch Set #1, Line 563: SHU_CA_CMD11_RG_RX_ARCA_DES_MODE_CA, (tr->dq_p2s_ratio == 16 ) ? 3 : 2);
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Patch Set #1, Line 565: SHU_B0_DQ11_RG_RX_ARDQ_DES_MODE_B0, (tr->dq_p2s_ratio == 16 ) ? 3 : 2);
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Patch Set #1, Line 567: SHU_B1_DQ11_RG_RX_ARDQ_DES_MODE_B1, (tr->dq_p2s_ratio == 16 ) ? 3 : 2);
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Patch Set #1, Line 570: case 2 :
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Patch Set #1, Line 573: case 4 :
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Patch Set #1, Line 579: default: dramc_dbg("ERROR: tr->ca_p2s_ratio= %2d, Not support!!",tr->ca_p2s_ratio);
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Patch Set #1, Line 579: default: dramc_dbg("ERROR: tr->ca_p2s_ratio= %2d, Not support!!",tr->ca_p2s_ratio);
trailing statements should be on next line
Patch Set #1, Line 587: switch (tr->dq_aamck_div) {
switch and case should be at the same indent
Patch Set #1, Line 588: case 2 :
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Patch Set #1, Line 591: case 4 :
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Patch Set #1, Line 597: default: dramc_dbg("WARN: tr->dq_aamck_div= %2d, Because of dq_semi_open, It's don't care.",tr->dq_aamck_div);
line over 96 characters
Patch Set #1, Line 597: default: dramc_dbg("WARN: tr->dq_aamck_div= %2d, Because of dq_semi_open, It's don't care.",tr->dq_aamck_div);
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Patch Set #1, Line 597: default: dramc_dbg("WARN: tr->dq_aamck_div= %2d, Because of dq_semi_open, It's don't care.",tr->dq_aamck_div);
trailing statements should be on next line
Patch Set #1, Line 606: case 2 :
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Patch Set #1, Line 609: case 4 :
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Patch Set #1, Line 615: default: dramc_dbg("ERROR: tr->ca_admck_div= %2d, Not support!!",tr->ca_admck_div);
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Patch Set #1, Line 615: default: dramc_dbg("ERROR: tr->ca_admck_div= %2d, Not support!!",tr->ca_admck_div);
trailing statements should be on next line
Patch Set #1, Line 697: dramc_dbg("Add DLL Gain = %d\n",gain);
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Patch Set #1, Line 1149: void ana_clk_div_config( ana_dvfs_core *tr, dvfs_group_config *dfs)
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Patch Set #1, Line 1163: tr->dq_ca_open = ( data_rate < (semi_open_fmin * 2)) ? 1 : 0;
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Patch Set #1, Line 1164: tr->dq_semi_open = ( data_rate/2 < pi_fmin) ? (1-tr->dq_ca_open) :
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Patch Set #1, Line 1166: tr->ca_semi_open = (( data_rate/(tr->ckr*2) < pi_fmin) ?
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Patch Set #1, Line 1168: (((tr->ca_p2s_ratio>2)||(tr->dq_semi_open)) * (1-tr->dq_ca_open))) :
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Patch Set #1, Line 1168: (((tr->ca_p2s_ratio>2)||(tr->dq_semi_open)) * (1-tr->dq_ca_open))) :
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Patch Set #1, Line 1170: tr->ca_full_rate = (tr->dq_ca_open == 1) ? ((tr->ckr>1)?1:0) :
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Patch Set #1, Line 1172: (( data_rate/(tr->ckr*2) < pi_fmin) ? (1-tr->ca_semi_open) : 0));
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Patch Set #1, Line 1173: tr->dq_ckdiv4_en = ( tr->dq_semi_open == 1) ? 0 :
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Patch Set #1, Line 1174: ((( (data_rate/2) < 1200) ? 1 : 0) * (1-tr->dq_ca_open)) ;
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Patch Set #1, Line 1174: ((( (data_rate/2) < 1200) ? 1 : 0) * (1-tr->dq_ca_open)) ;
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Patch Set #1, Line 1177: dq_pick = (tr->dq_semi_open == 1) ? 0 : (data_rate/2) ;
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Patch Set #1, Line 1178: ca_pick = (tr->ca_semi_open == 1) ? ca_mckio*2 : ((ca_mckio>=pi_fmin) ?
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Patch Set #1, Line 1179: ca_mckio : (( ca_mckio >= (pi_fmin/2)) ? ca_mckio*2 : ca_mckio *4));
need consistent spacing around '*' (ctx:WxV)
Patch Set #1, Line 1179: ca_mckio : (( ca_mckio >= (pi_fmin/2)) ? ca_mckio*2 : ca_mckio *4));
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Patch Set #1, Line 1180: tr->ca_ckdiv4_en = ((ca_pick < 1200) ? 1 : 0) * ( 1- tr->dq_ca_open) ;
need consistent spacing around '-' (ctx:VxW)
Patch Set #1, Line 1180: tr->ca_ckdiv4_en = ((ca_pick < 1200) ? 1 : 0) * ( 1- tr->dq_ca_open) ;
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Patch Set #1, Line 1180: tr->ca_ckdiv4_en = ((ca_pick < 1200) ? 1 : 0) * ( 1- tr->dq_ca_open) ;
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Patch Set #1, Line 1181: tr->ca_prediv_en = (data_rate >= 4800) ? 1 : 0 ;
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Patch Set #1, Line 1194: tr->semi_open_ca_pick_mck_ratio = ( mckio_semi == 0) ?
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Patch Set #1, Line 1195: 0 : (ca_pick*tr->dq_p2s_ratio)/data_rate ;
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Patch Set #1, Line 1199: tr->dq_track_ca_en = 0 ;
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Patch Set #1, Line 1200: tr->pll_freq = ((dq_pick * 2 * (tr->dq_ckdiv4_en+1)) > (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ?
line over 96 characters
Patch Set #1, Line 1200: tr->pll_freq = ((dq_pick * 2 * (tr->dq_ckdiv4_en+1)) > (ca_pick * 2 *(tr->ca_ckdiv4_en + 1))) ?
need consistent spacing around '*' (ctx:WxV)
Patch Set #1, Line 1203: if (data_rate==2400)
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Patch Set #1, Line 1205: else if (data_rate==1200)
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Patch Set #1, Line 1207: else if (data_rate==3200 || data_rate==1600)
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Patch Set #1, Line 1207: else if (data_rate==3200 || data_rate==1600)
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Patch Set #1, Line 1209: else if (data_rate==800)
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Patch Set #1, Line 1211: else if (data_rate==400)
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Patch Set #1, Line 1220: ana_dll_sequence(dvfs_core,a_cfg);
space required after that ',' (ctx:VxV)
File src/soc/mediatek/mt8192/dramc_subsys_config.c:
Patch Set #1, Line 10: switch(freq_group) {
space required before the open parenthesis '('
Patch Set #1, Line 52: dfs_gp->ckr = 1;
code indent should use tabs where possible
Patch Set #1, Line 52: dfs_gp->ckr = 1;
please, no space before tabs
Patch Set #1, Line 52: dfs_gp->ckr = 1;
please, no spaces at the start of a line
Patch Set #1, Line 58: a_cfg->aphy_comb_en = 1 ;
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Patch Set #1, Line 100: a_cfg->tx_odt_dis = (freq_group <= DDRFREQ_1200) ? 1 : 0 ;
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