Frans Hendriks has uploaded this change for review.

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soc/intel/braswell/southcluster.c: Correct typo in comment

BUG=N/A
TEST=build

Change-Id: I1b207e0b77bac8860ba7501378297c1f3604141c
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
---
M src/soc/intel/braswell/southcluster.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/32453/1

diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 000790d..bf9f689 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -347,7 +347,7 @@
  * Common code for the south cluster devices.
  */
 
-/* Set bit in function disble register to hide this device. */
+/* Set bit in function disable register to hide this device. */
 static void sc_disable_devfn(struct device *dev)
 {
 	void *func_dis = (void *)(PMC_BASE_ADDRESS + FUNC_DIS);

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