Marshall Dawson submitted this change.
soc/amd/picasso: Add controls for SMT and downcoring
BUG=b:159198385
TEST=confirm both using Mandolin
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I91654817608ab62e4104959b8876333911b90175
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43299
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/romstage.c
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 62272c0..b641379 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -93,6 +93,14 @@
/* PROCHOT_L de-assertion Ramp Time */
uint32_t prochot_l_deassertion_ramp_time;
+ enum {
+ DOWNCORE_AUTO = 0,
+ DOWNCORE_1 = 1, /* Run with single core */
+ DOWNCORE_2 = 3, /* Run with two cores */
+ DOWNCORE_3 = 4, /* Run with three cores */
+ } downcore_mode;
+ uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */
+
/* Lower die temperature limit */
uint32_t thermctl_limit;
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 372c6b5..e7b4b3d 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -43,6 +43,9 @@
mcfg->stapm_time_constant = config->stapm_time_constant;
}
+ mcfg->ccx_down_core_mode = config->downcore_mode;
+ mcfg->ccx_disable_smt = config->smt_disable;
+
mcfg->sustained_power_limit = config->sustained_power_limit;
mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time;
mcfg->thermctl_limit = config->thermctl_limit;
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