[WIP]src/arch/x86:Add support for low power idle table

Add coreboot support for LPIT residency.Residencies for each low power state
can be read via FFH (Function fixed hardware) or a memory mapped interface.
On platforms supporting S0ix sleep states, there can be two types of
residencies:
     CPU PKG C10 (Read via FFH interface)
     Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
The following attributes are added dynamically to the cpuidle sysfs attribute
group:
/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
The “low_power_idle_cpu_residency_us” attribute shows time spent by the CPU
package in PKG C10.
The “low_power_idle_system_residency_us” attribute shows SLP_S0 residency, or
system time spent with the SLP_S0# signal asserted. This is the lowest possible
system power state, achieved only when CPU is in PKG C10 and all functional
blocks in PCH are in a low power state. In this patch we can set the residency
via FFH or memory mapped depending on how we set the residency counter address.
Example:
1. For CNL: space_id:0,residency_counter.addrl:0x632 and ACPI_LPIT
selected in soc Kconfig sysfs file thet kernel creates is
/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us.
2. For CNL: space_id:0, residency_counter.addrl:0xfe000000 + 0x193C
and ACPI_LPIT elected in soc Kconfig sysfs file thet kernel creates is
/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us

Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Change-Id: Ie76ab0d50f09c98762bc674c2758520d53789137
---
M src/acpi/acpi.c
M src/arch/x86/Kconfig
M src/include/acpi/acpi.h
3 files changed, 144 insertions(+), 0 deletions(-)