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1 comment:
Commit Message:
Patch Set #1, Line 9: not apply to DDR4 configurations
does only apply to LPDDR* configurations
I've no idea if DDR5 could use the byte maps. Plus, the board at hand only supports DDR4, so why would I talk about LPDDR and risk being wrong about it? You know, I don't like being mistaken in writings that will eventually get set in stone (e.g. commit messages)... 😆
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I699d46b9b516be8946367e6d9b24883ae1e78d03
Gerrit-Change-Number: 46246
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Comment-Date: Fri, 09 Oct 2020 19:50:25 +0000
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Comment-In-Reply-To: Michael Niewöhner <foss@mniewoehner.de>
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