Nick Chen has uploaded this change for review.
mb/google/volteer/variants/eldrid: disable Fan Performance Control and Passive Policy
add dptf option and disable fan relate control from overridetree.cb
BUG=b:167931578
Signed-off-by: nick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com>
Change-Id: I99e429b90ed7de08385fe51ca742865b1266eef9
---
M src/mainboard/google/volteer/variants/eldrid/overridetree.cb
1 file changed, 69 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/45860/1
diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
index 6e9d743..1aef702 100644
--- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb
@@ -58,7 +58,75 @@
}"
device domain 0 on
- device pci 04.0 off end
+ device pci 04.0 on
+ # Default DPTF Policy for all Volteer boards if not overridden
+ chip drivers/intel/dptf
+ ## Active Policy
+ register "policies.active" = "{
+ [0] = {.target = DPTF_CPU,
+ .thresholds = {TEMP_PCT(85, 90),
+ TEMP_PCT(80, 69),
+ TEMP_PCT(75, 56),
+ TEMP_PCT(70, 46),
+ TEMP_PCT(65, 36),}},
+ [1] = {.target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {TEMP_PCT(50, 90),
+ TEMP_PCT(47, 69),
+ TEMP_PCT(45, 56),
+ TEMP_PCT(42, 46),
+ TEMP_PCT(39, 36),}},
+ [2] = {.target = DPTF_TEMP_SENSOR_1,
+ .thresholds = {TEMP_PCT(50, 90),
+ TEMP_PCT(47, 69),
+ TEMP_PCT(45, 56),
+ TEMP_PCT(42, 46),
+ TEMP_PCT(39, 36),}},
+ [3] = {.target = DPTF_TEMP_SENSOR_2,
+ .thresholds = {TEMP_PCT(50, 90),
+ TEMP_PCT(47, 69),
+ TEMP_PCT(45, 56),
+ TEMP_PCT(42, 46),
+ TEMP_PCT(39, 36),}},
+ [4] = {.target = DPTF_TEMP_SENSOR_3,
+ .thresholds = {TEMP_PCT(50, 90),
+ TEMP_PCT(47, 69),
+ TEMP_PCT(45, 56),
+ TEMP_PCT(42, 46),
+ TEMP_PCT(39, 36),}}}"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
+ [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}"
+
+ ## Power Limits Control
+ # 10-15W PL1 in 200mW increments, avg over 28-32s interval
+ # PL2 is fixed at 64W, avg over 28-32s interval
+ register "controls.power_limits" = "{
+ .pl1 = {.min_power = 3000,
+ .max_power = 15000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 200,},
+ .pl2 = {.min_power = 15000,
+ .max_power = 60000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 1000,}}"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 1700 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }}"
+
+ device generic 0 on end
+ end
+ end
device pci 15.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
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