Overall this looks good, thanks for the effort.
Before we finish the bring-up of next generation xeon-sp processor based platform, we do not know what are the coreboot differences between skylake-sp and next generation xeon-sp. Most assumptions made in this patch on the differences will be corrected over the course. One approach is to start upstreaming once we know the differences at large. With this approach, we need to be prepared to adjust further along the way.
3 comments:
File src/soc/intel/xeon_sp/bootblock.c:
Removing of this is a clean-up, that should go to a separate patch. So this patch can focus on supporting additional CPU type.
File src/soc/intel/xeon_sp/include/soc/iomap.h:
Addition of this code should go to a dedicated patch, so this patch can stick to its commit message.
File src/soc/intel/xeon_sp/skx/include/soc/pmc.h:
Patch Set #6, Line 2: * This file is part of the coreboot project.
This file should be a rename from src/soc/intel/xeon_sp/include/soc/pmc.h, instead of a new file.
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