Pablo Stebler has uploaded this change for review.
mainboard/dell: Add Latitude E7440
Based on autoport output.
Untested for now.
Signed-off-by: Pablo Stebler <pablo@stebler.xyz>
Change-Id: I9459d8dac9552529fc90633eaadd89f5118b237e
---
M src/mainboard/dell/latitude_e7x40/Kconfig
M src/mainboard/dell/latitude_e7x40/Kconfig.name
A src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/board_info.txt
A src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/gpio.c
A src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/hda_verb.c
A src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/overridetree.cb
6 files changed, 152 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46540/1
diff --git a/src/mainboard/dell/latitude_e7x40/Kconfig b/src/mainboard/dell/latitude_e7x40/Kconfig
index 05ed643..9b9bae7 100644
--- a/src/mainboard/dell/latitude_e7x40/Kconfig
+++ b/src/mainboard/dell/latitude_e7x40/Kconfig
@@ -23,10 +23,12 @@
config VARIANT_DIR
string
default "latitude_e7240" if BOARD_DELL_LATITUDE_E7240
+ default "latitude_e7440" if BOARD_DELL_LATITUDE_E7440
config MAINBOARD_PART_NUMBER
string
default "Latitude E7240" if BOARD_DELL_LATITUDE_E7240
+ default "Latitude E7440" if BOARD_DELL_LATITUDE_E7440
config VGA_BIOS_FILE
string
diff --git a/src/mainboard/dell/latitude_e7x40/Kconfig.name b/src/mainboard/dell/latitude_e7x40/Kconfig.name
index 5eefdf7..4532758 100644
--- a/src/mainboard/dell/latitude_e7x40/Kconfig.name
+++ b/src/mainboard/dell/latitude_e7x40/Kconfig.name
@@ -4,3 +4,8 @@
bool "Latitude E7240"
select BOARD_DELL_LATITUDE_E7x40
+
+config BOARD_DELL_LATITUDE_E7440
+ bool "Latitude E7440"
+
+ select BOARD_DELL_LATITUDE_E7x40
diff --git a/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/board_info.txt b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/board_info.txt
new file mode 100644
index 0000000..6d6a545
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/board_info.txt
@@ -0,0 +1 @@
+Board URL: https://www.dell.com/support/home/en-us/product-support/product/latitude-e7440-ultrabook/docs
diff --git a/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/gpio.c b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/gpio.c
new file mode 100644
index 0000000..89531a3
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/gpio.c
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/lynxpoint/lp_gpio.h>
+
+const struct pch_lp_gpio_map mainboard_gpio_map[] = {
+ [0] = LP_GPIO_OUT_LOW,
+ [1] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [2] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [3] = LP_GPIO_OUT_LOW,
+ [4] = LP_GPIO_NATIVE,
+ [5] = LP_GPIO_NATIVE,
+ [6] = LP_GPIO_NATIVE,
+ [7] = LP_GPIO_NATIVE,
+ [8] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [9] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [10] = LP_GPIO_OUT_LOW,
+ [11] = LP_GPIO_NATIVE,
+ [12] = LP_GPIO_NATIVE,
+ [13] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [14] = LP_GPIO_OUT_LOW,
+ [15] = LP_GPIO_OUT_LOW,
+ [16] = LP_GPIO_OUT_HIGH,
+ [17] = LP_GPIO_OUT_LOW,
+ [18] = LP_GPIO_NATIVE,
+ [19] = LP_GPIO_NATIVE,
+ [20] = LP_GPIO_NATIVE,
+ [21] = LP_GPIO_NATIVE,
+ [22] = LP_GPIO_NATIVE,
+ [23] = LP_GPIO_NATIVE,
+ [24] = LP_GPIO_OUT_LOW,
+ [25] = LP_GPIO_OUT_LOW,
+ [26] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT },
+ [27] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [28] = LP_GPIO_OUT_LOW,
+ [29] = LP_GPIO_NATIVE,
+ [30] = LP_GPIO_NATIVE,
+ [31] = LP_GPIO_NATIVE,
+ [32] = LP_GPIO_NATIVE,
+ [33] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [34] = LP_GPIO_OUT_HIGH,
+ [35] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [36] = LP_GPIO_OUT_LOW,
+ [37] = LP_GPIO_NATIVE,
+ [38] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [39] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [40] = LP_GPIO_NATIVE,
+ [41] = LP_GPIO_NATIVE,
+ [42] = LP_GPIO_NATIVE,
+ [43] = LP_GPIO_NATIVE,
+ [44] = LP_GPIO_OUT_LOW,
+ [45] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .route = GPIO_ROUTE_SMI,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [46] = LP_GPIO_OUT_LOW,
+ [47] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [48] = LP_GPIO_OUT_LOW,
+ [49] = LP_GPIO_OUT_LOW,
+ [50] = LP_GPIO_OUT_HIGH,
+ [51] = LP_GPIO_OUT_LOW,
+ [52] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [53] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [54] = LP_GPIO_OUT_LOW,
+ [55] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [56] = LP_GPIO_OUT_HIGH,
+ [57] = LP_GPIO_OUT_HIGH,
+ [58] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT },
+ [59] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [60] = LP_GPIO_OUT_LOW,
+ [61] = LP_GPIO_NATIVE,
+ [62] = LP_GPIO_NATIVE,
+ [63] = LP_GPIO_NATIVE,
+ [64] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [65] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [66] = LP_GPIO_OUT_LOW,
+ [67] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [68] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [69] = LP_GPIO_OUT_HIGH,
+ [70] = LP_GPIO_OUT_LOW,
+ [71] = LP_GPIO_NATIVE,
+ [72] = LP_GPIO_NATIVE,
+ [73] = LP_GPIO_OUT_LOW,
+ [74] = LP_GPIO_NATIVE,
+ [75] = LP_GPIO_NATIVE,
+ [76] = LP_GPIO_OUT_HIGH,
+ [77] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [78] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL,
+ .route = GPIO_ROUTE_SMI },
+ [79] = LP_GPIO_NATIVE,
+ [80] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [81] = LP_GPIO_NATIVE,
+ [82] = LP_GPIO_NATIVE,
+ [83] = LP_GPIO_OUT_HIGH,
+ [84] = LP_GPIO_OUT_HIGH,
+ [85] = LP_GPIO_OUT_HIGH,
+ [86] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [87] = LP_GPIO_OUT_LOW,
+ [88] = LP_GPIO_OUT_LOW,
+ [89] = LP_GPIO_OUT_HIGH,
+ [90] = LP_GPIO_OUT_HIGH,
+ [91] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [92] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [93] = LP_GPIO_OUT_LOW,
+ [94] = LP_GPIO_OUT_LOW,
+ LP_GPIO_END
+};
diff --git a/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/hda_verb.c b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/hda_verb.c
new file mode 100644
index 0000000..e358006
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/hda_verb.c
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ 0x10ec0292, /* Codec Vendor / Device ID: Realtek */
+ 0x102805cb, /* Subsystem ID */
+ 12, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0, 0x102805cb),
+ AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+ AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+ AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
+ AZALIA_PIN_CFG(0, 0x16, 0x01014020),
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x19, 0x01a19030),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40700001),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/overridetree.cb b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/overridetree.cb
new file mode 100644
index 0000000..cc31dc8
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7x40/variants/latitude_e7440/overridetree.cb
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip northbridge/intel/haswell
+ device domain 0x0 on
+ subsystemid 0x1028 0x05cb inherit
+ end
+end
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