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Patch Set #3, Line 10: https://github.com/otcshare/CCG-TGL-Generic-SiC/tree/master/ClientOneSiliconPkg/IpBlock/Tcss/AcpiTables/SegSsdt
404
i see, looks like its restricted access for distribution.
And even if it would be available, that somebody put it on GitHub
doesn't mean they are on solid ground.
Its Intel validated and distributed Reference code for BIOS vendors hence i assume (ensure) those code been tested but that doesn't mean that its the best code. i will try to follow the design you have suggested here based on my discussion with RC team (your feedback https://review.coreboot.org/c/coreboot/+/40722)
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Gerrit-Project: coreboot
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