Patrick Rudolph has uploaded this change for review.
[WIP]device/Kconfig: Introduce separate graphics menu for Intel
Allows to select an Intel graphics driver and a "generic" graphics driver.
TODO: Split it into even more chunks.
Change-Id: I410fecfdb8a99ca520b2c05edd9ed2558d7e0a92
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M payloads/external/SeaBIOS/Kconfig
M src/device/Kconfig
M src/device/pci_device.c
M src/device/pci_rom.c
M src/drivers/intel/gma/Makefile.inc
M src/drivers/intel/gma/int15.h
M src/mainboard/bostentech/gbyt4/mainboard.c
M src/mainboard/google/link/mainboard.c
M src/mainboard/google/rambi/mainboard.c
M src/mainboard/kontron/ktqm77/mainboard.c
M src/northbridge/intel/i945/Kconfig
M src/northbridge/intel/i945/gma.c
M src/northbridge/intel/pineview/Kconfig
M src/northbridge/intel/pineview/gma.c
M src/soc/intel/common/block/timer/Kconfig
15 files changed, 83 insertions(+), 42 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/49176/1
diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig
index 9aea2d0..6399116 100644
--- a/payloads/external/SeaBIOS/Kconfig
+++ b/payloads/external/SeaBIOS/Kconfig
@@ -64,7 +64,7 @@
config SEABIOS_VGA_COREBOOT
prompt "Include generated option rom that implements legacy VGA BIOS compatibility"
default y if !VENDOR_EMULATION
- depends on !VGA_ROM_RUN && (VGA_TEXT_FRAMEBUFFER || LINEAR_FRAMEBUFFER)
+ depends on !(VGA_ROM_RUN || VGA_ROM_RUN_INTEL) && (VGA_TEXT_FRAMEBUFFER || LINEAR_FRAMEBUFFER)
bool
help
coreboot can initialize the GPU of some mainboards.
diff --git a/src/device/Kconfig b/src/device/Kconfig
index baa7110..6df9c17 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -71,8 +71,6 @@
default NO_GFX_INIT if VGA_BIOS && PAYLOAD_SEABIOS
default VGA_ROM_RUN if VGA_BIOS
default MAINBOARD_DO_NATIVE_VGA_INIT
- default MAINBOARD_USE_LIBGFXINIT
- default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT
config MAINBOARD_DO_NATIVE_VGA_INIT
bool "Use native graphics init"
@@ -82,16 +80,6 @@
display without the need of a binary only VGA OPROM. Enabling this
option may be faster, but also lacks flexibility in setting modes.
-config MAINBOARD_USE_LIBGFXINIT
- bool "Use libgfxinit"
- depends on MAINBOARD_HAS_LIBGFXINIT
- select HAVE_VGA_TEXT_FRAMEBUFFER
- select HAVE_LINEAR_FRAMEBUFFER
- select VGA if VGA_TEXT_FRAMEBUFFER
- help
- Use the SPARK library `libgfxinit` for the native graphics
- initialization. This requires an Ada toolchain.
-
# TODO: Explain differences (if any) for onboard cards.
config VGA_ROM_RUN
bool "Run VGA Option ROMs"
@@ -106,6 +94,56 @@
more complete BIOS interrupt services available than coreboot,
which some option ROMs require in order to function correctly.
+config NO_GFX_INIT
+ bool "None"
+ depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT
+ help
+ Select this to not perform any graphics initialization in
+ coreboot. This is useful if the payload (e.g. SeaBIOS) can
+ initialize graphics or if pre-boot graphics are not required.
+
+endchoice
+
+choice
+ prompt "Intel Integrated Graphics initialization"
+ default NO_INTEL_GFX_INIT if VGA_BIOS && PAYLOAD_SEABIOS
+ default VGA_ROM_RUN_INTEL if VGA_BIOS
+ default MAINBOARD_DO_NATIVE_INTEL_VGA_INIT
+ default MAINBOARD_USE_LIBGFXINIT
+ default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT
+
+config MAINBOARD_DO_NATIVE_INTEL_VGA_INIT
+ bool "Use native graphics init"
+ depends on MAINBOARD_HAS_NATIVE_INTEL_VGA_INIT
+ help
+ Some mainboards, such as the Asus P5gc, allow initializing the
+ display without the need of a binary only VGA OPROM. Enabling this
+ option may be faster, but also lacks flexibility in setting modes
+ in the payload or legacy OS.
+
+config MAINBOARD_USE_LIBGFXINIT
+ bool "Use libgfxinit"
+ depends on MAINBOARD_HAS_LIBGFXINIT
+ select HAVE_VGA_TEXT_FRAMEBUFFER
+ select HAVE_LINEAR_FRAMEBUFFER
+ select VGA if VGA_TEXT_FRAMEBUFFER
+ help
+ Use the SPARK library `libgfxinit` for the native graphics
+ initialization. This requires an Ada toolchain.
+
+config VGA_ROM_RUN_INTEL
+ bool "Run Legacy Intel VGA Option ROMs"
+ depends on PCI && ARCH_X86 && !MAINBOARD_FORCE_NATIVE_VGA_INIT
+ select HAVE_VGA_TEXT_FRAMEBUFFER
+ help
+ Execute Intel VGA Option ROMs in coreboot if found. This can be
+ used to enable onboard Intel video cards when not using a SeaBIOS
+ payload.
+
+ When using a SeaBIOS payload it runs all option ROMs with much
+ more complete BIOS interrupt services available than coreboot,
+ which some option ROMs require in order to function correctly.
+
config RUN_FSP_GOP
bool "Run a GOP driver"
depends on HAVE_FSP_GOP && !MAINBOARD_NO_FSP_GOP
@@ -115,13 +153,12 @@
to run a GOP blob. This option enables graphics initialization with
such a blob.
-config NO_GFX_INIT
+config NO_INTEL_GFX_INIT
bool "None"
- depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT
help
Select this to not perform any graphics initialization in
- coreboot. This is useful if the payload (e.g. SeaBIOS) can
- initialize graphics or if pre-boot graphics are not required.
+ coreboot on the IGD. This is useful if the payload (e.g. SeaBIOS)
+ can initialize graphics or if pre-boot graphics are not required.
endchoice
@@ -138,7 +175,7 @@
config S3_VGA_ROM_RUN
bool "Re-run VGA Option ROMs on S3 resume"
default y
- depends on VGA_ROM_RUN && HAVE_ACPI_RESUME
+ depends on (VGA_ROM_RUN || VGA_ROM_RUN_INTEL) && HAVE_ACPI_RESUME
help
Execute VGA Option ROMs in coreboot when resuming from S3 suspend.
@@ -150,7 +187,7 @@
config ALWAYS_LOAD_OPROM
def_bool n
- depends on VGA_ROM_RUN
+ depends on VGA_ROM_RUN || VGA_ROM_RUN_INTEL
help
Always load option ROMs if any are found. The decision to run
the ROM is still determined at runtime, but the distinction
@@ -171,7 +208,7 @@
bool "Load Option ROMs on PCI devices"
default n if PAYLOAD_SEABIOS
default y if !PAYLOAD_SEABIOS
- depends on VGA_ROM_RUN
+ depends on VGA_ROM_RUN || VGA_ROM_RUN_INTEL
help
Load Option ROMs stored on PCI/PCIe/AGP VGA devices in coreboot.
@@ -190,7 +227,7 @@
prompt "Option ROM execution type"
default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86
default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86
- depends on VGA_ROM_RUN
+ depends on VGA_ROM_RUN || VGA_ROM_RUN_INTEL
config PCI_OPTION_ROM_RUN_REALMODE
prompt "Native mode"
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index a7eb91d..bfdeeaf 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -718,6 +718,10 @@
static int should_load_oprom(struct device *dev)
{
+ if (!CONFIG(VGA_ROM_RUN) && CONFIG(VGA_ROM_RUN_INTEL) &&
+ dev->vendor != PCI_VENDOR_ID_INTEL)
+ return 0;
+
/* If S3_VGA_ROM_RUN is disabled, skip running VGA option
* ROMs when coming out of an S3 resume.
*/
@@ -737,7 +741,7 @@
{
struct rom_header *rom, *ram;
- if (!CONFIG(VGA_ROM_RUN))
+ if (!CONFIG(VGA_ROM_RUN) && !CONFIG(VGA_ROM_RUN_INTEL))
return;
/* Only execute VGA ROMs. */
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index 4224c65..13ee765 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -178,7 +178,7 @@
struct rom_header *run_rom;
struct pci_data *rom_data;
- if (!CONFIG(VGA_ROM_RUN))
+ if (!CONFIG(VGA_ROM_RUN) && !CONFIG(VGA_ROM_RUN_INTEL))
return NULL;
run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START;
diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc
index 964d13e..d73f800 100644
--- a/src/drivers/intel/gma/Makefile.inc
+++ b/src/drivers/intel/gma/Makefile.inc
@@ -2,7 +2,7 @@
ramstage-$(CONFIG_INTEL_DDI) += intel_ddi.c
ramstage-$(CONFIG_INTEL_EDID) += edid.c vbt.c
-ifeq ($(CONFIG_VGA_ROM_RUN),y)
+ifeq ($(CONFIG_VGA_ROM_RUN_INTEL),y)
ramstage-$(CONFIG_INTEL_INT15) += int15.c
endif
ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c
diff --git a/src/drivers/intel/gma/int15.h b/src/drivers/intel/gma/int15.h
index cddd4ac..461d144 100644
--- a/src/drivers/intel/gma/int15.h
+++ b/src/drivers/intel/gma/int15.h
@@ -27,7 +27,7 @@
GMA_INT15_ACTIVE_LFP_EDP = 0x03,
};
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
/* Install custom int15 handler for VGA OPROM */
void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type);
#else
diff --git a/src/mainboard/bostentech/gbyt4/mainboard.c b/src/mainboard/bostentech/gbyt4/mainboard.c
index d0131bc..857a0c2 100644
--- a/src/mainboard/bostentech/gbyt4/mainboard.c
+++ b/src/mainboard/bostentech/gbyt4/mainboard.c
@@ -2,12 +2,12 @@
#include <device/device.h>
#include <console/console.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
#include <x86emu/x86emu.h>
#endif
#include <arch/interrupt.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
static int int15_handler(void)
{
int res = 1;
@@ -98,7 +98,7 @@
static void mainboard_enable(struct device *dev)
{
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c
index c4b621a..fd04031 100644
--- a/src/mainboard/google/link/mainboard.c
+++ b/src/mainboard/google/link/mainboard.c
@@ -4,7 +4,7 @@
#include <device/device.h>
#include <device/pci_ops.h>
#include <console/console.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
#include <x86emu/x86emu.h>
#endif
#include <acpi/acpi.h>
@@ -18,7 +18,7 @@
#include <ec/google/chromeec/ec.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
static int int15_handler(void)
{
int res = 0;
@@ -171,7 +171,7 @@
dev->ops->init = mainboard_init;
dev->ops->get_smbios_data = link_onboard_smbios_data;
dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c
index 41d9795..894cc74 100644
--- a/src/mainboard/google/rambi/mainboard.c
+++ b/src/mainboard/google/rambi/mainboard.c
@@ -2,7 +2,7 @@
#include <device/device.h>
#include <console/console.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
#include <x86emu/x86emu.h>
#endif
#include <arch/interrupt.h>
@@ -13,7 +13,7 @@
#include <bootstate.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
static int int15_handler(void)
{
int res = 1;
@@ -144,7 +144,7 @@
dev->ops->init = mainboard_init;
dev->ops->get_smbios_data = mainboard_smbios_data;
dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c
index 95e639a..c571c7f 100644
--- a/src/mainboard/kontron/ktqm77/mainboard.c
+++ b/src/mainboard/kontron/ktqm77/mainboard.c
@@ -4,14 +4,14 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <console/console.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
#include <x86emu/x86emu.h>
#endif
#include <option.h>
#include <arch/interrupt.h>
#include <southbridge/intel/bd82x6x/pch.h>
-#if CONFIG(VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN_INTEL)
static int int15_handler(void)
{
int res = 0;
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 091d2f1..919331b 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -12,7 +12,7 @@
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select INTEL_EDID
- select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
+ select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_INTEL_VGA_INIT
select PARALLEL_MP
config VBOOT
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index b396eff..7447ab2 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -672,7 +672,7 @@
if (!CONFIG(NO_GFX_INIT))
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
- if (CONFIG(MAINBOARD_DO_NATIVE_VGA_INIT)) {
+ if (CONFIG(MAINBOARD_DO_NATIVE_INTEL_VGA_INIT)) {
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
if (acpi_is_wakeup_s3()) {
printk(BIOS_INFO,
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 962825a..fe4fd6b 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -10,8 +10,8 @@
select HAVE_DEBUG_RAM_SETUP
select VGA
select MAINBOARD_HAS_NATIVE_INTEL_VGA_INIT
- select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
- select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
+ select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_INTEL_VGA_INIT
+ select INTEL_EDID if MAINBOARD_DO_NATIVE_INTEL_VGA_INIT
select INTEL_GMA_ACPI
select PARALLEL_MP
select NO_CBFS_MCACHE
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index e0ed0f0..fcd05f8 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -224,7 +224,7 @@
if (!CONFIG(NO_GFX_INIT))
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
- if (!CONFIG(MAINBOARD_DO_NATIVE_VGA_INIT)) {
+ if (!CONFIG(MAINBOARD_DO_NATIVE_INTEL_VGA_INIT)) {
/* PCI init, will run VBIOS */
pci_dev_init(dev);
} else {
diff --git a/src/soc/intel/common/block/timer/Kconfig b/src/soc/intel/common/block/timer/Kconfig
index 42613a8..f7d705c 100644
--- a/src/soc/intel/common/block/timer/Kconfig
+++ b/src/soc/intel/common/block/timer/Kconfig
@@ -5,7 +5,7 @@
config USE_LEGACY_8254_TIMER
bool "Use Legacy 8254 Timer"
- default y if PAYLOAD_SEABIOS || VGA_ROM_RUN
+ default y if PAYLOAD_SEABIOS || VGA_ROM_RUN || VGA_ROM_RUN_INTEL
default n
help
Setting this makes the Legacy 8254 Timer available by disabling
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