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8 comments:
Commit Message:
nit: […]
Done
This can be confusing as
other platforms, such as ARM, use a different way of mapping the pci
config space to memory.
My understanding so far (for QC IIUC) is that there is a single 4K window in MMIO space, and some ot […]
Thanks, Tim. That's probably much better than I can explain it :).
File payloads/external/Makefile.inc:
Patch Set #3, Line 149: CONFIG_ECAM_MMCONF_BASE_ADDRESS=$(CONFIG_ECAM_MMCONF_BASE_ADDRESS) \
This change and the one in payloads/external/tianocore/Makefile. […]
This was not intentional, but what I wanted to do was maintain functionality at this point. As ECAM is the only access method implemented right now, I wanted to stick all existing MMIO functionality under that umbrella. The intention is to create another config for the ARM MMIO access mechanism. We should be able to add support for both if needed in the future.
File src/device/Kconfig:
Patch Set #3, Line 502: NO_ECAM_MMCONF_SUPPORT
Maybe add some help text to this and the config below explaining what ECAM_MMCONF is? Basically jus […]
Done
Patch Set #3, Line 504: default n
default y if !x86 ?
Done
Patch Set #3, Line 506: ECAM_MMCONF_SUPPORT
Make this depend on X86?
Done
Patch Set #3, Line 622: depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT)
Does this specifically depend on ECAM, or just MMCONF?
No, but all the current MMCONF support only covers ECAM and is only used by x86, so we thought that it would be cleaner to just move everything to under the ECAM config and create a new config for the ARM side of things.
Patch Set #3, Line 639: default 16 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 128
Same as above.
See response above.
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