Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Mathew King: Looks good to me, approved
arch/x86/acpigen: Add new helper routines for XOR and get_rx_gpio

Add new helper function in the acpigen library, that use the underlying
soc routines.

Change-Id: I8d65699d3c806007a50adcb51c5d84567ce451b7
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
---
M Documentation/acpi/gpio.md
M src/arch/x86/acpigen.c
M src/arch/x86/include/arch/acpigen.h
3 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/Documentation/acpi/gpio.md b/Documentation/acpi/gpio.md
index d42042f..abde3a0 100644
--- a/Documentation/acpi/gpio.md
+++ b/Documentation/acpi/gpio.md
@@ -73,6 +73,15 @@
functions internally. Thus, all the ACPI AML calling conventions for
the platform functions apply to these helper functions as well.

+3. Get Rx GPIO
+ int acpigen_get_rx_gpio(struct acpi_gpio gpio)
+
+This function takes as input, an struct acpi_gpio type and outputs
+AML code to read the *logical* value of a gpio (after taking its
+polarity into consideration), into the Local0 variable. It calls
+the platform specific acpigen_soc_read_rx_gpio() to actually read
+the raw Rx gpio value.
+
## Implementation Details

ACPI library in coreboot will provide weak definitions for all the
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c
index 72605bb..9162cdb 100644
--- a/src/arch/x86/acpigen.c
+++ b/src/arch/x86/acpigen.c
@@ -1203,6 +1203,15 @@
acpigen_emit_byte(res);
}

+/* Xor (arg1, arg2, res) */
+void acpigen_write_xor(uint8_t arg1, uint8_t arg2, uint8_t res)
+{
+ acpigen_emit_byte(XOR_OP);
+ acpigen_emit_byte(arg1);
+ acpigen_emit_byte(arg2);
+ acpigen_emit_byte(res);
+}
+
/* And (arg1, arg2, res) */
void acpigen_write_and(uint8_t arg1, uint8_t arg2, uint8_t res)
{
@@ -1759,6 +1768,14 @@
return acpigen_soc_clear_tx_gpio(gpio->pins[0]);
}

+void acpigen_get_rx_gpio(struct acpi_gpio *gpio)
+{
+ acpigen_soc_read_rx_gpio(gpio->pins[0]);
+
+ if (gpio->polarity == ACPI_GPIO_ACTIVE_LOW)
+ acpigen_write_xor(LOCAL0_OP, 1, LOCAL0_OP);
+}
+
/* refer to ACPI 6.4.3.5.3 Word Address Space Descriptor section for details */
void acpigen_resource_word(u16 res_type, u16 gen_flags, u16 type_flags, u16 gran,
u16 range_min, u16 range_max, u16 translation, u16 length)
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index 0807558..34c5197 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -361,6 +361,7 @@
void acpigen_write_store(void);
void acpigen_write_store_ops(uint8_t src, uint8_t dst);
void acpigen_write_or(uint8_t arg1, uint8_t arg2, uint8_t res);
+void acpigen_write_xor(uint8_t arg1, uint8_t arg2, uint8_t res);
void acpigen_write_and(uint8_t arg1, uint8_t arg2, uint8_t res);
void acpigen_write_not(uint8_t arg, uint8_t res);
void acpigen_write_debug_string(const char *str);
@@ -472,6 +473,14 @@
int acpigen_enable_tx_gpio(struct acpi_gpio *gpio);
int acpigen_disable_tx_gpio(struct acpi_gpio *gpio);

+/*
+ * Helper function for getting a RX GPIO value based on the GPIO polarity.
+ * The return value is stored in Local0 variable.
+ * This function ends up calling acpigen_soc_get_rx_gpio to make callbacks
+ * into SoC acpigen code
+ */
+void acpigen_get_rx_gpio(struct acpi_gpio *gpio);
+
/* refer to ACPI 6.4.3.5.3 Word Address Space Descriptor section for details */
void acpigen_resource_word(u16 res_type, u16 gen_flags, u16 type_flags, u16 gran,
u16 range_min, u16 range_max, u16 translation, u16 length);
@@ -481,4 +490,5 @@
/* refer to ACPI 6.4.3.5.1 QWord Address Space Descriptor section for details */
void acpigen_resource_qword(u16 res_type, u16 gen_flags, u16 type_flags,
u64 gran, u64 range_min, u64 range_max, u64 translation, u64 length);
+
#endif

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8d65699d3c806007a50adcb51c5d84567ce451b7
Gerrit-Change-Number: 39145
Gerrit-PatchSet: 5
Gerrit-Owner: Rajat Jain <rajatja@google.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Mathew King <mathewk@chromium.org>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Rajat Jain <rajatja@google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-MessageType: merged