Angel Pons has uploaded this change for review.

View Change

sb/intel/lynxpoint/pcie.c: Fix subtle blunder

If only C had a decent type system...

Change-Id: I85734a68a42ec65b124d68514039a1dda7946adc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/lynxpoint/pcie.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45713/1

diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c
index 5e69fca..3e1f63b 100644
--- a/src/southbridge/intel/lynxpoint/pcie.c
+++ b/src/southbridge/intel/lynxpoint/pcie.c
@@ -283,8 +283,7 @@
 		/* Update PECR1 register. */
 		pci_or_config8(dev, 0xe8, 1);
 
-		/* FIXME: Are we supposed to update this register with a constant boolean? */
-		pci_update_config8(dev, 0x324, ~(1 << 5), (1 < 5));
+		pci_or_config8(dev, 0x324, 1 << 5);
 
 		/* Per-Port CLKREQ# handling. */
 		if (is_lp && gpio_is_native(18 + rp - 1))

To view, visit change 45713. To unsubscribe, or for help writing mail filters, visit settings.