Arthur Heymans has uploaded this change for review.

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nb/intel/nehalem: Fix the ACPI PCIE MMCONF range

The QPI functions are at PCI bus 0xff.

Change-Id: I064585e97b0a04decfcee0742f3258175d7930b9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/northbridge/intel/nehalem/acpi/nehalem.asl
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/35870/1

diff --git a/src/northbridge/intel/nehalem/acpi/nehalem.asl b/src/northbridge/intel/nehalem/acpi/nehalem.asl
index df8aad7..eff39b0 100644
--- a/src/northbridge/intel/nehalem/acpi/nehalem.asl
+++ b/src/northbridge/intel/nehalem/acpi/nehalem.asl
@@ -28,7 +28,7 @@
 		Memory32Fixed(ReadWrite, DEFAULT_MCHBAR,   0x00008000)
 		Memory32Fixed(ReadWrite, DEFAULT_DMIBAR,   0x00001000)
 		Memory32Fixed(ReadWrite, DEFAULT_EPBAR,    0x00001000)
-		Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000)
+		Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x10000000)
 		Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
 		Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
 		Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH

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