[coreboot-gerrit] Change in coreboot[master]: /soc/intel/skylake: make tcc_offset take effect

[Marx Wang (Code Review)]

Marx Wang has uploaded this change for review. ( https://review.coreboot.org/22818

Change subject: /soc/intel/skylake: make tcc_offset take effect
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/soc/intel/skylake: make tcc_offset take effect

Currently, the "tcc_offset" defined in devicetree is overwritted by Intel FSP-S UPD "TccActivationOffset".
This patch will make "TccActivationOffset" refer to "tcc_offset".

TEST=check if MSR(0x1a[29:24]) value is updated with "tcc_offset" by iotools in ChromeOS.

Change-Id: Ibc6f33bea19a1d59bc7e407815210942b38f0702
Signed-off-by: marxwang 
---
M src/soc/intel/skylake/chip_fsp20.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/22818/1

diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 8e5cc2a..f04647d 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -290,6 +290,9 @@
    /* Enable/Disable EIST */
    tconfig->Eist = config->eist_enable;

+	/* Set TccActivationOffset */
+	tconfig->TccActivationOffset = config->tcc_offset;
+
    soc_irq_settings(params);
 }