Patch Set 2:

Patch Set 2:

Patch Set 2:

not that it makes a big difference here, but is the SIO part of the ast2400 behind a PCI(e) device or is it connected to the LPC bus?

It's connected to PCIe, LPC and USB.

Logically, I believe SIO must be on LPC; PCI bridges only forward IO transactions that fall within the (configured) IO window in PCI configuration register space.

IIRC at least in some platforms it depends on if the LPC or PCI bus is selected as target for the subtraction IO decode; haven't looked at the details though

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Gerrit-Project: coreboot
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