2 comments:
File src/soc/amd/picasso/acpi.c:
Patch Set #6, Line 50: FSP populates this generates this HOB if it initializes second IOAPIC
With the current patches in flight, it'll be enabled all the time. […]
I ask because I am wondering if we should pass in the IOAPIC address for the NB from coreboot to FSP as a UPD instead of adding another HOB for it. That way you don't really need to check for the HOB in all places where it has to be used and instead rely on using the macro/Kconfig.
Also, probably we want to also declare it as reserved resource here: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/amd/common/block/lpc/lpc.c?id=refs/heads/master#n125?
I suspect it was meant to be indented, e.g. […]
I see. Sounds good.
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