Patrick Georgi submitted this change.
mb/google/dedede: Enable SaGv support
Allow MRC training in SaGv low, mid and high frequencies.
TEST=Verify memory trains at low, mid and high SaGv point
through FSP debug logs enabled.
Change-Id: I0f60aad031ce9dfe23e54426753311c35db46c05
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45196
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/google/dedede/variants/baseboard/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index fe232e6..b2ed21a 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -168,6 +168,9 @@
# Skip the CPU repalcement check
register "SkipCpuReplacementCheck" = "1"
+ # Sagv Configuration
+ register "SaGv" = "SaGv_Enabled"
+
# Set the minimum assertion width
register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "1" # 1s
To view, visit change 45196. To unsubscribe, or for help writing mail filters, visit settings.