Elyes Haouas has uploaded this change for review.
tree: Use boolean for s0ix_enable
Change-Id: Id0ab5e641684e03da555a127808c0def5a53cbe6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
---
M src/mainboard/aoostar/wtr_r1/devicetree.cb
M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
M src/mainboard/cwwk/adl/devicetree.cb
M src/mainboard/google/auron/devicetree.cb
M src/mainboard/google/auron/variants/buddy/overridetree.cb
M src/mainboard/google/auron/variants/samus/overridetree.cb
M src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
M src/mainboard/google/brya/variants/orisa/overridetree.cb
M src/mainboard/google/brya/variants/trulo/overridetree.cb
M src/mainboard/google/dedede/variants/baseboard/devicetree.cb
M src/mainboard/google/drallion/variants/drallion/devicetree.cb
M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
M src/mainboard/google/hatch/variants/baseboard/devicetree.cb
M src/mainboard/google/puff/variants/baseboard/devicetree.cb
M src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
M src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
M src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
M src/mainboard/intel/adlrvp/devicetree.cb
M src/mainboard/intel/adlrvp/devicetree_m.cb
M src/mainboard/intel/adlrvp/devicetree_n.cb
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
M src/mainboard/prodrive/atlas/devicetree.cb
M src/mainboard/prodrive/hermes/devicetree.cb
M src/mainboard/protectli/vault_ehl/devicetree.cb
M src/mainboard/purism/librem_jsl/devicetree.cb
M src/mainboard/purism/librem_l1um_v2/devicetree.cb
M src/mainboard/system76/tgl-u/devicetree.cb
M src/soc/intel/elkhartlake/chip.h
M src/soc/intel/tigerlake/chip.h
43 files changed, 43 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/84159/1
diff --git a/src/mainboard/aoostar/wtr_r1/devicetree.cb b/src/mainboard/aoostar/wtr_r1/devicetree.cb
index 101bb99..a802cca 100644
--- a/src/mainboard/aoostar/wtr_r1/devicetree.cb
+++ b/src/mainboard/aoostar/wtr_r1/devicetree.cb
@@ -14,7 +14,7 @@
register "dptf_enable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "common_soc_config" = "{
.i2c[0] = {
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
index 5e93271..730f5ef 100644
--- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
+++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
@@ -1,5 +1,5 @@
chip soc/intel/cannonlake
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "common_soc_config" = "{
/* Touchpad */
.i2c[0] = {
diff --git a/src/mainboard/cwwk/adl/devicetree.cb b/src/mainboard/cwwk/adl/devicetree.cb
index 15ec3b2..c4c5e8c 100644
--- a/src/mainboard/cwwk/adl/devicetree.cb
+++ b/src/mainboard/cwwk/adl/devicetree.cb
@@ -1,6 +1,6 @@
chip soc/intel/alderlake
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)"
register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)"
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 2ded452..49db518 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -17,7 +17,7 @@
chip cpu/intel/haswell
device cpu_cluster 0 on ops broadwell_cpu_bus_ops end
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
end
device domain 0 on
diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb
index be96e95..d1e217b 100644
--- a/src/mainboard/google/auron/variants/buddy/overridetree.cb
+++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb
@@ -14,7 +14,7 @@
chip cpu/intel/haswell
device cpu_cluster 0 on end
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
end
device domain 0 on
diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb
index 3de469ec..b0b8a60 100644
--- a/src/mainboard/google/auron/variants/samus/overridetree.cb
+++ b/src/mainboard/google/auron/variants/samus/overridetree.cb
@@ -16,7 +16,7 @@
device cpu_cluster 0 on end
# Disable S0ix for now
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
register "vr_config" = "{
.slow_ramp_rate_set = 3,
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
index 22e15ac..b900af1 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
+++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
@@ -15,7 +15,7 @@
register "sagv" = "SaGv_Enabled"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable package C state demotion on Raptorlake as a W/A for S0ix issues
# seen on J0 and Q0 SKUs
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index 38535a4..2ba54bc 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -15,7 +15,7 @@
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 0290181..e07cf2a 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -12,7 +12,7 @@
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable package C state demotion on Raptorlake as a W/A for S0ix issues
# seen on J0 and Q0 SKUs
diff --git a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
index 4372888..f91b088 100644
--- a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
@@ -12,7 +12,7 @@
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index aac4bca..3d28ed3 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -29,7 +29,7 @@
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb
index ffc3a56..ad5b943 100644
--- a/src/mainboard/google/brya/variants/orisa/overridetree.cb
+++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb
@@ -24,7 +24,7 @@
register "pmc_gpe0_dw2" = "GPP_F"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index a5b346c..868342b 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -24,7 +24,7 @@
register "pmc_gpe0_dw2" = "GPP_F"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 534db38..cc2b66d 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -145,7 +145,7 @@
register "SdCardPowerEnableActiveHigh" = "1"
# Enable S0ix support
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Display related UPDs
# Select eDP for port A
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index 302a09e..7238a06 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -39,7 +39,7 @@
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "power_limits_config" = "{
.tdp_pl1_override = 25,
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 49ff8dd..2fe3e46 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -53,7 +53,7 @@
}"
# Enable S0i3 support
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable STT support
register "stt_control" = "1"
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 39cea80..8c33f02 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -28,7 +28,7 @@
# Enable System Agent dynamic frequency
register "SaGv" = "SaGv_Enabled"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb
index 9e8e96a..08880cb 100644
--- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb
@@ -28,7 +28,7 @@
# Enable System Agent dynamic frequency
register "SaGv" = "SaGv_Enabled"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
index c0ef101..2cfa075 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
@@ -31,7 +31,7 @@
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
index f0f9598..18c4192 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
@@ -31,7 +31,7 @@
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 7626083..58c725e 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -31,7 +31,7 @@
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
index d3038f5..9e8f870 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
@@ -31,7 +31,7 @@
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index fcaa730..7eec7a8 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -27,7 +27,7 @@
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "satapwroptimize" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 589ea1c..d10fd1f 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -30,7 +30,7 @@
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "satapwroptimize" = "1"
register "AcousticNoiseMitigation" = "1"
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 5dfc69c..4ff518e 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -195,7 +195,7 @@
register "DdiPort4Ddc" = "0"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index 5959e79..a6bad13 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -132,7 +132,7 @@
# TCSS USB3
register "tcss_aux_ori" = "0"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "serial_io_i2c_mode" = "{
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index a0d38b3..922b673 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -95,7 +95,7 @@
# TCSS USB3
register "tcss_aux_ori" = "0"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "serial_io_i2c_mode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb
index 6776284..c01613c 100644
--- a/src/mainboard/intel/adlrvp/devicetree_n.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_n.cb
@@ -70,7 +70,7 @@
register "tcss_aux_ori" = "4"
register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_E20, .pad_auxn_dc = GPP_E21}"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "serial_io_i2c_mode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
index bee71aa..012afc4 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
@@ -40,7 +40,7 @@
register "PcieClkSrcClkReq[5]" = "5"
# Disable S0ix
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
device domain 0 on
device pci 00.0 on end # Host Bridge
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
index 0ba9e83..e49c102 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
@@ -38,7 +38,7 @@
register "sdcard_cd_gpio" = "GPP_G5"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Intel Common SoC Config
#+-------------------+---------------------------+
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 59d69dc..1495366 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -150,7 +150,7 @@
}"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "VGPIO_39"
diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb
index 010cae2..e97d19e 100644
--- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb
+++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb
@@ -50,7 +50,7 @@
register "cnvi_bt_core" = "true"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
index fb55da4..b864da6 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
@@ -19,7 +19,7 @@
register "sagv" = "SaGv_Enabled"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-A Port A0
register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # Type-A Port A1
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index b82f583..69ec546 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -68,7 +68,7 @@
register "TcssAuxOri" = "0"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 51895b2..fbb8418 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -75,7 +75,7 @@
register "TcssAuxOri" = "0"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb
index 1c4af58..580ca76 100644
--- a/src/mainboard/prodrive/atlas/devicetree.cb
+++ b/src/mainboard/prodrive/atlas/devicetree.cb
@@ -20,7 +20,7 @@
register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled"
# Disable S0ix
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
# Display configuration (4 DPs)
register "ddi_ports_config" = "{
diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb
index 317de80..6e1ecfd 100644
--- a/src/mainboard/prodrive/hermes/devicetree.cb
+++ b/src/mainboard/prodrive/hermes/devicetree.cb
@@ -105,7 +105,7 @@
register "tcc_offset" = "1" # TCC of 99C
# Disable S0ix
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
# Enable Turbo
register "eist_enable" = "true"
diff --git a/src/mainboard/protectli/vault_ehl/devicetree.cb b/src/mainboard/protectli/vault_ehl/devicetree.cb
index df0dbdf..10782b2 100644
--- a/src/mainboard/protectli/vault_ehl/devicetree.cb
+++ b/src/mainboard/protectli/vault_ehl/devicetree.cb
@@ -11,7 +11,7 @@
register "eist_enable" = "true"
# Enable lpss s0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# GPE configuration
# Note that GPE events called out in ASL code rely on this
diff --git a/src/mainboard/purism/librem_jsl/devicetree.cb b/src/mainboard/purism/librem_jsl/devicetree.cb
index f8e494a..c00404d 100644
--- a/src/mainboard/purism/librem_jsl/devicetree.cb
+++ b/src/mainboard/purism/librem_jsl/devicetree.cb
@@ -1,7 +1,7 @@
chip soc/intel/jasperlake
register "eist_enable" = "true"
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
register "SaGv" = "SaGv_Enabled"
diff --git a/src/mainboard/purism/librem_l1um_v2/devicetree.cb b/src/mainboard/purism/librem_l1um_v2/devicetree.cb
index e26e6b2..cf1a8b8 100644
--- a/src/mainboard/purism/librem_l1um_v2/devicetree.cb
+++ b/src/mainboard/purism/librem_l1um_v2/devicetree.cb
@@ -19,7 +19,7 @@
register "PcieClkSrcClkReq[14]" = "PCIE_CLK_NOTUSED"
register "PcieClkSrcClkReq[15]" = "PCIE_CLK_NOTUSED"
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
register "eist_enable" = "true"
diff --git a/src/mainboard/system76/tgl-u/devicetree.cb b/src/mainboard/system76/tgl-u/devicetree.cb
index 67bdf8e..fd6c590 100644
--- a/src/mainboard/system76/tgl-u/devicetree.cb
+++ b/src/mainboard/system76/tgl-u/devicetree.cb
@@ -15,7 +15,7 @@
register "eist_enable" = "true"
# Enable s0ix, required for TGL-U
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
# Enable C6 DRAM
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index 2227d1b..e3a23b2 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -128,7 +128,7 @@
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* Enable DPTF support */
int dptf_enable;
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 4d4e2a1..630317a 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -141,7 +141,7 @@
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* S0iX: Selectively disable individual sub-states, by default all are enabled. */
enum lpm_state_mask LpmStateDisableMask;
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