Attention is currently required from: Felix Singer, Tim Wawrzynczak, Angel Pons, Michael Niewöhner.

View Change

5 comments:

• Commit Message:

  • Patch Set #1, Line 12: - GMBUS (no idea, I'm even unable to verify BXT \o/)

    linux: i915/display/intel_gmbus. […]

    I'd hope they didn't change things this time. Usually, it would
    only be about clocking and maybe pin mapping.

  • Patch Set #1, Line 13: - TBT / Type-C

    I'll probably need some help here

    If they did it right /o\ there'd be nothing to do. It should be handled
    by different hardware / layers. Something (AIUI often integrated into
    the PD controller) needs to decide to mux the lanes, DP-Aux channel
    and hot-plug signal to the display controller. And when that's done
    the display controller wouldn't have to know about it.

    I didn't play with any actual implementations, though. So maybe I wish
    for too much sanity in the stack :)

• File common/hw-gfx-gma-config.ads.template:

  • Patch Set #1, Line 57: when Skylake => Cannon_Point);

    This would have to be changed back later when the CPU parts for
    Tiger Lake are added. Actually, I don't see the reason to change
    it in the first place?

  • Patch Set #1, Line 168: Cannon_Point_On : <genbool> := Skylake_On and then PCH >= Cannon_Point;

    This definitely shouldn't change. It's supposed to mean `[From] Cannon Point
    On` iow. Cannon Point and later.

• File common/hw-gfx-gma.ads:

  • Patch Set #1, Line 58: Cannon_Point

    comma? ;)

To view, visit change 61211. To unsubscribe, or for help writing mail filters, visit settings.