Subrata Banik submitted this change.

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soc/intel/tigerlake: Select correct fsp_param as per SoC Kconfig

New Kconfig for Jasperlake soc was created and fsp_param for Jasperlake
has differences compared to Tigerlake. Thus renaming fsp_params.c to
fsp_params_tgl.c to point out correct file as per soc selected.

Also adding new file for fsp_param_jsl for Jasperlake SoC and currently
its the copy of fsp_param_tgl.
TODO: update files with correct fsp_params

Change-Id: I12815ae28a1eb4c64afda0a85b5c14fc0da3e4b1
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37267
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/intel/tigerlake/Makefile.inc
R src/soc/intel/tigerlake/fsp_params_jsl.c
C src/soc/intel/tigerlake/fsp_params_tgl.c
M src/soc/intel/tigerlake/romstage/Makefile.inc
R src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
C src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
6 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc
index 0d5aecb..532861d 100644
--- a/src/soc/intel/tigerlake/Makefile.inc
+++ b/src/soc/intel/tigerlake/Makefile.inc
@@ -33,7 +33,8 @@
 ramstage-y += elog.c
 ramstage-y += espi.c
 ramstage-y += finalize.c
-ramstage-y += fsp_params.c
+ramstage-$(CONFIG_SOC_INTEL_TIGERLAKE) += fsp_params_tgl.c
+ramstage-$(CONFIG_SOC_INTEL_JASPERLAKE) += fsp_params_jsl.c
 ramstage-y += gpio.c
 ramstage-y += graphics.c
 ramstage-y += lockdown.c
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params_jsl.c
similarity index 100%
rename from src/soc/intel/tigerlake/fsp_params.c
rename to src/soc/intel/tigerlake/fsp_params_jsl.c
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params_tgl.c
similarity index 100%
copy from src/soc/intel/tigerlake/fsp_params.c
copy to src/soc/intel/tigerlake/fsp_params_tgl.c
diff --git a/src/soc/intel/tigerlake/romstage/Makefile.inc b/src/soc/intel/tigerlake/romstage/Makefile.inc
index 8d151e3..2bf9812 100644
--- a/src/soc/intel/tigerlake/romstage/Makefile.inc
+++ b/src/soc/intel/tigerlake/romstage/Makefile.inc
@@ -13,7 +13,8 @@
 # GNU General Public License for more details.
 #
 
-romstage-y += fsp_params.c
+romstage-$(CONFIG_SOC_INTEL_TIGERLAKE) += fsp_params_tgl.c
+romstage-$(CONFIG_SOC_INTEL_JASPERLAKE) += fsp_params_jsl.c
 romstage-y += ../../../../cpu/intel/car/romstage.c
 romstage-y += romstage.c
 romstage-y += pch.c
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
similarity index 100%
rename from src/soc/intel/tigerlake/romstage/fsp_params.c
rename to src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
similarity index 100%
copy from src/soc/intel/tigerlake/romstage/fsp_params.c
copy to src/soc/intel/tigerlake/romstage/fsp_params_tgl.c

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