Jonathan Neuschäfer has uploaded this change for review.
arch/riscv: Update comment about mstatus initialization
Coreboot does not setup virtual memory anymore.
Change-Id: I231af07b2988e8362d1cdd606ce889fb31136ff1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
M src/arch/riscv/bootblock.S
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/28831/1
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S
index 95e1923..277c391 100644
--- a/src/arch/riscv/bootblock.S
+++ b/src/arch/riscv/bootblock.S
@@ -66,7 +66,7 @@
# clear any pending interrupts
csrwi mip, 0
- # set up the mstatus register for VM
+ # set up the mstatus register
call mstatus_init
tail main
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