1 comment:
File src/soc/intel/alderlake/romstage/fsp_params.c:
Patch Set #22, Line 158: /* Skip CPU side PCIe enablement in FSP if device is disabled in devicetree */
@Subrata, please help check should I keep this logic or not? Or I can just use
m_cfg->CpuPcieRpEnableMask = pcie_rp_init(m_cfg, CPU_PCIE_RP, config->cpu_pcie_rp, CONFIG_MAX_ROOT_PORTS); to replace it.
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