[coreboot-gerrit] [M] Change in coreboot[main]: device/pciexp_device.c: Fix setting Max Payload Size

[Michał Żygowski (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Krystian Hebel, Kyösti Mälkki, Nico Huber, Patrick Rudolph.

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77338?usp=email )

Change subject: device/pciexp_device.c: Fix setting Max Payload Size
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Patch Set 11:

(2 comments)

File src/device/pciexp_device.c:

https://review.coreboot.org/c/coreboot/+/77338/comment/ab4c1e35_0b1feedf :
PS10, Line 645: 	pciexp_limit_max_payload_ctl(dev->bus->dev, pciexp_configured_max_payload(dev), cap);
> > pciexp_scan_bus discovers devices from the root towards end devices. […]

Now traversing the topology in a loop and updating the Max Payload Size up to the root port each time new downstream device is discovered.

https://review.coreboot.org/c/coreboot/+/77338/comment/ad6722f9_2dc1e7db :
PS10, Line 709: pciexp_configure_max_payload
> I have added another print: […]

Finally figured out how it should work. Now traversing the topology in a loop and updating the Max Payload Size up to the root port each time new downstream device is discovered.