[coreboot-gerrit] Change in coreboot[master]: amd/microcode: Change equivalant ID width to 16bit

[Bao Zheng (Code Review)]

Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41869 )

Change subject: amd/microcode: Change equivalant ID width to 16bit
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Patch Set 3:
> Patch Set 3: Code-Review-1
> > uint16_t processor_rev_id;  //This field is 16bit.
> >    uint8_t chipset1_rev_id;
> >    uint8_t chipset2_rev_id;
>
> I've looked at the fam 16h models 30-3fh BKDG and that matches the existing struct.
>
> In fam17h RV1/PCO PPR the microcode patch equivalent processor ID is 4 bytes long and the chipset revision ID fields don't seem to exist any more. See the PPR section "Microcode Patch Block (MPB)".
>
> So the struct needs to be split into two different versions for pre-zen and zen. in both cases the processor revision ID starts at offset 18h == 24

MPB_NB_ID         0010h 4 
MPB_SB_ID         0014h 4 
MPB_REVISION      0018h 4 
MPB_BIOS_REVISION 001Ch 1
(Reserved)        001Dh 3 
Patch Data        0020h 2272

Here MPB_BIOS_REVISION has the same offset as equivalent processor ID. But this field combines the
equivalent processor ID, Chipset1 RevisionID and Chipset2 RevisionID.
The AGESA source code also compares the 16bit data to decide if the patch is going to be loaded.