Arthur Heymans has uploaded this change for review.

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arch/x86: Don't use .bss from car.ld if not running XIP

Some platform run early stages like romstage and verstage from CAR
instead of XIP. This allows to link them like other arch inside the
_program region.

Change-Id: I6cf51f943dde5f642d75ba4c5d3be520dc56370a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/arch/x86/assembly_entry.S
M src/arch/x86/car.ld
M src/include/rules.h
M src/lib/program.ld
4 files changed, 12 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/48156/1

diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index 31670c2..7d7d3fc 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -36,6 +36,7 @@
 	mov	$_STACK_TOP, %esp
 
 	/* clear .bss section as it is not shared */
+#if ENV_STAGE_XIP
 	cld
 	xor	%eax, %eax
 	movl	$(_ebss), %ecx
@@ -43,6 +44,7 @@
 	sub	%edi, %ecx
 	shrl	$2, %ecx
 	rep	stosl
+#endif
 
 #if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
 	|| (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index c291efb..38128d1 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -62,6 +62,7 @@
 	 * cbmem console. This is useful for clearing this area on a per-stage
 	 * basis when more than one stage uses cache-as-ram. */
 
+#if ENV_STAGE_HAS_CAR_XIP_BSS
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_bss = .;
 	/* Allow global uninitialized variables for stages without CAR teardown. */
@@ -71,6 +72,7 @@
 	*(.sbss.*)
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_ebss = .;
+#endif
 
 #if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
 	_shadow_size = (_ebss - _car_region_start) >> 3;
diff --git a/src/include/rules.h b/src/include/rules.h
index 6ebb37e..f503914 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -261,14 +261,21 @@
 #if ENV_X86
 /* Indicates memory layout is determined with arch/x86/car.ld. */
 #define ENV_CACHE_AS_RAM		(ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM))
+/* Indicates if the stage runs XIP. */
+#define ENV_STAGE_XIP			(ENV_CACHE_AS_RAM && \
+					 !((ENV_ROMSTAGE || ENV_SEPARATE_VERSTAGE) && CONFIG(NO_XIP_EARLY_STAGES)))
 /* No .data sections with execute-in-place from ROM.  */
 #define ENV_STAGE_HAS_DATA_SECTION	!ENV_CACHE_AS_RAM
 #else
 /* Both .data and .bss, sometimes SRAM not DRAM. */
 #define ENV_STAGE_HAS_DATA_SECTION	1
 #define ENV_CACHE_AS_RAM		0
+#define ENV_STAGE_XIP			0
 #endif
 
+/* Indicates if the stages uses the _bss region defined in arch/x86/car.ld */
+#define ENV_STAGE_HAS_CAR_XIP_BSS	ENV_STAGE_XIP
+
 /* Currently rmodules, ramstage and smm have heap. */
 #define ENV_STAGE_HAS_HEAP_SECTION	(ENV_RMODULE || ENV_RAMSTAGE || ENV_SMM)
 
diff --git a/src/lib/program.ld b/src/lib/program.ld
index 3b6aa2e..ff3c672 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -103,7 +103,7 @@
 }
 #endif
 
-#if !ENV_CACHE_AS_RAM
+#if !ENV_STAGE_HAS_CAR_XIP_BSS
 .bss . : {
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_bss = .;

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