Felix Held submitted this change.
15 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
nb/intel/gm45: Remove apic 0 from devicetree
This is added at runtime.
Change-Id: Ife2865f91e3d046bc66e423b2054f56176f57fc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69300
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/lenovo/t400/devicetree.cb
M src/mainboard/lenovo/x200/devicetree.cb
M src/mainboard/roda/rk9/devicetree.cb
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 7946e34..1df350a 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -10,12 +10,7 @@
register "slfm" = "1"
- device cpu_cluster 0 on
- ops gm45_cpu_bus_ops
- chip cpu/intel/socket_p
- device lapic 0 on end
- end
- end
+ device cpu_cluster 0 on ops gm45_cpu_bus_ops end
register "pci_mmio_size" = "2048"
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index 814491b..6ddd090 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -10,12 +10,7 @@
register "slfm" = "1"
- device cpu_cluster 0 on
- ops gm45_cpu_bus_ops
- chip cpu/intel/socket_BGA956
- device lapic 0 on end
- end
- end
+ device cpu_cluster 0 on ops gm45_cpu_bus_ops end
register "pci_mmio_size" = "2048"
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index bb2cd70..e070ae1 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -2,12 +2,7 @@
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "slfm" = "1"
- device cpu_cluster 0 on
- ops gm45_cpu_bus_ops
- chip cpu/intel/socket_BGA956
- device lapic 0 on end
- end
- end
+ device cpu_cluster 0 on ops gm45_cpu_bus_ops end
register "pci_mmio_size" = "2048"
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