Patch Set 2:

Patch Set 1:

AmdGetValue() was invalid in the first place, it is not part of AGESA specification and was already removed during amd/stoneyridge reviews from that PI build.

That cpu_bus_scan() uses is just wrong and probably does not even do what it is supposed to.

Any suggestions on how to rewrite the cpu_bus_scan? What would be the best approach?

IIRC the code in cpu_bus_scan() was somewhat adapted from native Family 10h or 15h and intended for full flexibility on Opterons, so it wanted to look at each chip within an MCM, each processor in every neighboring socket, etc. However, Kaveri, Carrizo, and Mullins were all single-APU designs, and I don't recall any of these being an MCM, so the algorithm should be capable of being simplified quite a bit. The number of cores in CPUID Fn0000_0001 can imply the number of LAPICs.

It's been a while since I thought about it, but I believe we were able to remove this in ST by changing over to mp_init_with_smm(). It seems like each core updates the tree as it responds to the INIT/SIPI sequence.

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