Felix Held submitted this change.

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Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
soc/amd/*/cpu: handle mp_init_with_smm failure

When the mp_init_with_smm call returns a failure, coreboot can't just
continue with the initialization and boot process due to the system
being in a bad state. Ignoring the failure here would just cause the
boot process failing elsewhere where it may not be obvious that the
failed multi-processor initialization step was the root cause of that.
I'm not 100% sure if calling do_cold_reset or calling die_with_post_code
is the better option here. Calling do_cold_reset likely here would
likely result in a boot-failure loop, so I call die_with_post_code here.

BUG=b:193809448

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
---
M src/soc/amd/cezanne/cpu.c
M src/soc/amd/picasso/cpu.c
M src/soc/amd/stoneyridge/cpu.c
3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index c3d89bf..440b5ba 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -51,9 +51,9 @@

void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");

/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index 9822326..b80b0f7 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -55,9 +55,9 @@

void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");

/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 0655032..6be76bf 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -52,9 +52,9 @@

void mp_init_cpus(struct bus *cpu_bus)
{
- /* Clear for take-off */
- /* TODO: Handle mp_init_with_smm failure? */
- mp_init_with_smm(cpu_bus, &mp_ops);
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
+ die_with_post_code(POST_HW_INIT_FAILURE,
+ "mp_init_with_smm failed. Halting.\n");

/* The flash is now no longer cacheable. Reset to WP for performance. */
mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT);

2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifeadffb3bae749c4bbd7ad2f3f395201e67d9e28
Gerrit-Change-Number: 58859
Gerrit-PatchSet: 4
Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: Raul Rangel <rrangel@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged